2001 |
20 | EE | Albert Wang,
Earl Killian,
Dror E. Maydan,
Chris Rowen:
Hardware/Software Instruction Set Configurability for System-on-Chip Processors.
DAC 2001: 184-188 |
19 | EE | Jagesh V. Sanghavi,
Albert Wang:
Estimation of Speed, Area, and Power of Parameterizable, Soft IP.
DAC 2001: 31-34 |
18 | | Ying Zhao,
Sharad Malik,
Albert Wang,
Matthew W. Moskewicz,
Conor F. Madigan:
Matching Architecture to Application Via Configurable Processors: A Case Study with Boolean Satisfiability Problem.
ICCD 2001: 447-452 |
17 | | Gavin Minami,
Zixiang Xiong,
Albert Wang,
Sanjeev Mehrotra:
3-D wavelet coding of video with arbitrary regions of support.
IEEE Trans. Circuits Syst. Video Techn. 11(9): 1063-1068 (2001) |
16 | | Philip A. Chou,
Alexander E. Mohr,
Albert Wang,
Sanjeev Mehrotra:
Error control for receiver-driven layered multicast of audio and video.
IEEE Transactions on Multimedia 3(1): 108-122 (2001) |
2000 |
15 | EE | Philip A. Chou,
Alexander E. Mohr,
Albert Wang,
Sanjeev Mehrotra:
FEC and Pseudo-ARQ for Receiver-Driven Layered Multicast of Audio and Video.
Data Compression Conference 2000: 440-449 |
1999 |
14 | EE | Albert Wang,
Zixiang Xiong,
Philip A. Chou,
Sanjeev Mehrotra:
Three-Dimensional Wavelet Coding of Video with Global Motion Compensation.
Data Compression Conference 1999: 404-413 |
13 | EE | Philip A. Chou,
Sanjeev Mehrotra,
Albert Wang:
Multiple Description Decoding of Overcomplete Expansions Using Projections onto Convex Sets.
Data Compression Conference 1999: 72-81 |
1996 |
12 | EE | Stan Y. Liao,
Srinivas Devadas,
Kurt Keutzer,
Steven W. K. Tjiang,
Albert Wang:
Storage Assignment to Decrease Code Size.
ACM Trans. Program. Lang. Syst. 18(3): 235-253 (1996) |
11 | | Maher Kaddoura,
Sanjay Ranka,
Albert Wang:
Array Decompositions for Nonuniform Computational Environments.
J. Parallel Distrib. Comput. 36(2): 91-105 (1996) |
1995 |
10 | EE | Stan Y. Liao,
Srinivas Devadas,
Kurt Keutzer,
Steven W. K. Tjiang,
Albert Wang:
Code Optimization Techniques for Embedded DSP Microprocessors.
DAC 1995: 599-604 |
9 | EE | Peter Vanbekbergen,
Albert Wang,
Kurt Keutzer:
A Design and Validation System for Asynchronous Circuits.
DAC 1995: 725-730 |
8 | | Stan Y. Liao,
Srinivas Devadas,
Kurt Keutzer,
Steven W. K. Tjiang,
Albert Wang:
Storage Assignment to Decrease Code Size.
PLDI 1995: 186-195 |
1994 |
7 | | Guido Araujo,
Srinivas Devadas,
Kurt Keutzer,
Stan Y. Liao,
Sharad Malik,
Ashok Sudarsanam,
Steven W. K. Tjiang,
Albert Wang:
Challenges in code generation for embedded processors.
Code Generation for Embedded Processors 1994: 48-64 |
6 | EE | Srinivas Devadas,
Kurt Keutzer,
Sharad Malik,
Albert Wang:
Certified timing verification and the transition delay of a logic circuit.
IEEE Trans. VLSI Syst. 2(3): 333-342 (1994) |
5 | EE | Srinivas Devadas,
Kurt Keutzer,
Sharad Malik,
Albert Wang:
Event suppression: improving the efficiency of timing simulation for synchronous digital circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(6): 814-822 (1994) |
4 | EE | Srinivas Devadas,
Kurt Keutzer,
Sharad Malik,
Albert Wang:
Verification of asynchronous interface circuits with bounded wire delays.
VLSI Signal Processing 7(1-2): 161-182 (1994) |
1993 |
3 | EE | Srinivas Devadas,
Kurt Keutzer,
Sharad Malik,
Albert Wang:
Computation of floating mode delay in combinational circuits: practice and implementation.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1924-1936 (1993) |
1992 |
2 | EE | Srinivas Devadas,
Kurt Keutzer,
Sharad Malik,
Albert Wang:
Certified Timing Verification and the Transition Delay of a Logic Circuit.
DAC 1992: 549-555 |
1 | EE | Srinivas Devadas,
Kurt Keutzer,
Sharad Malik,
Albert Wang:
Verification of asynchronous interface circuits with bounded wire delays.
ICCAD 1992: 188-195 |