Masakazu Yamashina

2000
3	EE	Masakazu Yamashina, Masato Motomura: Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI: invited talk. ASP-DAC 2000: 329-332
2	EE	Masato Edahiro, Satoshi Matsushita, Masakazu Yamashina, Naoki Nishi: A Single-Chip Multiprocessor for Smart Terminals. IEEE Micro 20(4): 12-20 (2000)
1998
1	EE	Masato Motomura, Yoshiharu Aimoto, Atsufkni Shibayama, Yoshikazu Yabe, Masakazu Yamashina: An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration. FCCM 1998: 264-266

Coauthor Index

1	Yoshiharu Aimoto	[1]
2	Masato Edahiro	[2]
3	Satoshi Matsushita	[2]
4	Masato Motomura	[1] [3]
5	Naoki Nishi	[2]
6	Atsufkni Shibayama	[1]
7	Yoshikazu Yabe	[1]

Colors in the list of coauthors