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Masakazu Yamashina

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2000
3EEMasakazu Yamashina, Masato Motomura: Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI: invited talk. ASP-DAC 2000: 329-332
2EEMasato Edahiro, Satoshi Matsushita, Masakazu Yamashina, Naoki Nishi: A Single-Chip Multiprocessor for Smart Terminals. IEEE Micro 20(4): 12-20 (2000)
1998
1EEMasato Motomura, Yoshiharu Aimoto, Atsufkni Shibayama, Yoshikazu Yabe, Masakazu Yamashina: An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration. FCCM 1998: 264-266

Coauthor Index

1Yoshiharu Aimoto [1]
2Masato Edahiro [2]
3Satoshi Matsushita [2]
4Masato Motomura [1] [3]
5Naoki Nishi [2]
6Atsufkni Shibayama [1]
7Yoshikazu Yabe [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)