| 2008 |
|---|
| 6 | EE | Jorg Daniels,
Wim Dehaene,
Michiel Steyaert,
Andreas Wiesbauer:
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter.
ISCAS 2008: 1648-1651 |
| 2006 |
|---|
| 5 | EE | Andreas Wiesbauer,
Dietmar Straussnigg,
Richard Gaggl,
Martin Clara,
Luis Hernández,
Daniel Gruber:
Clock jitter compensation for current steering DACs.
ISCAS 2006 |
| 4 | EE | Luis Hernández,
Susanna Patón,
Andreas Wiesbauer:
Spectral shaping of clock jitter errors for continuous time sigma-delta modulators.
ISCAS 2006 |
| 2004 |
|---|
| 3 | | Luis Hernández,
Andreas Wiesbauer,
Susanna Patón,
Antonio Di Giandomenico:
Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction.
ISCAS (1) 2004: 1072-1075 |
| 2 | | Martin Clara,
Andreas Wiesbauer,
Wolfgang Klatzer:
Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors.
ISCAS (1) 2004: 285-288 |
| 2003 |
|---|
| 1 | EE | Lukas Dorrer,
Antonio Di Giandomenico,
Andreas Wiesbauer:
A 10-bit, 4 mW continuous-time sigma-delta ADC for UMTS in a 0.12µm CMOS process.
ISCAS (1) 2003: 1057-1060 |
