2005 |
11 | EE | Balaram Sinharoy,
Ronald N. Kalla,
Joel M. Tendler,
Richard J. Eickemeyer,
Jody B. Joyner:
POWER5 system microarchitecture.
IBM Journal of Research and Development 49(4-5): 505-522 (2005) |
10 | EE | Harry M. Mathis,
Alex E. Mericas,
John D. McCalpin,
Richard J. Eickemeyer,
Steven R. Kunkel:
Characterization of simultaneous multithreading (SMT) efficiency in POWER5.
IBM Journal of Research and Development 49(4-5): 555-564 (2005) |
2000 |
9 | EE | Steven R. Kunkel,
Richard J. Eickemeyer,
Mikko H. Lipasti,
Timothy J. Mullins,
Brian O'Krafka,
Harold Rosenberg,
Steven P. Vanderwiel,
Philip L. Vitale,
Larry D. Whitley:
A performance methodology for commercial servers.
IBM Journal of Research and Development 44(6): 851-872 (2000) |
8 | EE | John M. Borkenhagen,
Richard J. Eickemeyer,
Ronald N. Kalla,
Steven R. Kunkel:
A multithreaded PowerPC processor for commercial servers.
IBM Journal of Research and Development 44(6): 885-898 (2000) |
1997 |
7 | | Richard J. Eickemeyer,
Ross E. Johnson,
Steven R. Kunkel,
Beng-Hong Lim,
Mark S. Squillante,
Ching-Farn Eric Wu:
Evaluation of Multithreaded Processors and Thread-Switch Policies.
ISHPC 1997: 75-90 |
1996 |
6 | EE | Richard J. Eickemeyer,
Ross E. Johnson,
Steven R. Kunkel,
Mark S. Squillante,
Shiafun Liu:
Evaluation of Multithreaded Uniprocessors for Commercial Application Environments.
ISCA 1996: 203-212 |
1994 |
5 | | Stamatis Vassiliadis,
Bart Blaner,
Richard J. Eickemeyer:
SCISM: A scalable compound instruction set machine.
IBM Journal of Research and Development 38(1): 59-78 (1994) |
1993 |
4 | | Richard J. Eickemeyer,
Stamatis Vassiliadis:
A load-instruction unit for pipelined processors.
IBM Journal of Research and Development 37(4): 547-564 (1993) |
1992 |
3 | EE | Nadeem Malik,
Richard J. Eickemeyer,
Stamatis Vassiliadis:
Interlock collapsing ALU for increased instruction-level parallelism.
MICRO 1992: 149-157 |
1988 |
2 | | Richard J. Eickemeyer,
Janak H. Patel:
Performance Evaluation of On-Chip Register and Cache Organizations.
ISCA 1988: 64-72 |
1987 |
1 | | Richard J. Eickemeyer,
Janak H. Patel:
Performance Evaluation of Multiple Register Sets.
ISCA 1987: 264-271 |