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Ing-Chao Lin

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2006
2EEIng-Chao Lin, Suresh Srinivasan, Narayanan Vijaykrishnan, Nagu R. Dhanwada: Transaction Level Error Susceptibility Model for Bus Based SoC Architectures. ISQED 2006: 775-780
2005
1EENagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan: A power estimation methodology for systemC transaction level models. CODES+ISSS 2005: 142-147

Coauthor Index

1Nagu R. Dhanwada [1] [2]
2Vijay Narayanan [1]
3Suresh Srinivasan [2]
4Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [2]

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