| |
| 2007 | ||
|---|---|---|
| 2 | EE | Je-Hoon Lee, Young-Sin Cho, Seok-Man Kim, Kyoung-Rok Cho: On-Chip Bus Modeling for Power and Performance Estimation. SAMOS 2007: 200-210 |
| 2006 | ||
| 1 | EE | Young-Sin Cho, Eun-Ju Choi, Kyoung-Rok Cho: Modeling and analysis of the system bus latency on the SoC platform. SLIP 2006: 67-74 |
| 1 | Kyoung-Rok Cho | [1] [2] |
| 2 | Eun-Ju Choi | [1] |
| 3 | Seok-Man Kim | [2] |
| 4 | Je-Hoon Lee | [2] |