2009 |
13 | EE | Andreas Hansson,
Kees Goossens,
Marco Bekooij,
Jos Huisken:
CoMPSoC: A template for composable and predictable multi-processor system on chips.
ACM Trans. Design Autom. Electr. Syst. 14(1): (2009) |
2008 |
12 | EE | Jochem Govers,
Jos Huisken,
Mladen Berekovic,
Olivier Rousseaux,
Frank Bouwens,
Michael De Nil,
Jef L. van Meerbergen:
Implementation of an UWB Impulse-Radio Acquisition and Despreading Algorithm on a Low Power ASIP.
HiPEAC 2008: 82-96 |
2007 |
11 | EE | Akash Kumar,
Andreas Hansson,
Jos Huisken,
Henk Corporaal:
Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip.
DATE 2007: 117-122 |
10 | EE | Jos Huisken:
Integrating VLIW Processors with a Network on Chip.
SAMOS 2007: 2 |
9 | EE | Lennart Yseboodt,
Michael De Nil,
Jos Huisken,
Mladen Berekovic,
Qin Zhao,
Frank Bouwens,
Jef L. van Meerbergen:
Design of 100 muW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring.
SAMOS 2007: 385-395 |
2006 |
8 | EE | Ramesh Chidambaram,
Rene van Leuken,
Marc Quax,
Ingolf Held,
Jos Huisken:
A multistandard FFT processor for wireless system-on-chip implementations.
ISCAS 2006 |
7 | EE | Chris Bartels,
Jos Huisken,
Kees Goossens,
Patrick Groeneveld,
Jef L. van Meerbergen:
Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip.
VLSI-SoC 2006: 80-85 |
2004 |
6 | EE | Marc Quax,
Jos Huisken,
Jef L. van Meerbergen:
A Scalable Implementation of a Reconfigurable WCDMA Rake Receiver.
DATE 2004: 230-235 |
5 | EE | Mauro Cocco,
John Dielissen,
Marc J. M. Heijligers,
Andries Hekstra,
Jos Huisken:
A Scalable Architecture for LDPC Decodin.
DATE 2004: 88-95 |
2001 |
4 | EE | John Dielissen,
Jef L. van Meerbergen,
Marco Bekooij,
Françoise Harmsze,
Sergej Sawitzki,
Jos Huisken,
Albert van der Werf:
Power-efficient layered turbo decoder processor.
DATE 2001: 246-251 |
2000 |
3 | EE | Marco Bekooij,
Jos Huisken,
K. Nowak:
Numerical Accuracy of Fast Fourier Transforms with CORDIC Arithmetic.
VLSI Signal Processing 25(2): 187-193 (2000) |
1993 |
2 | EE | Jos Huisken,
A. Delaruelle,
B. Egberts,
P. Eeckhout,
Jef L. van Meerbergen:
Synthesis of synchronous communication hardware in a multiprocessor architecture.
VLSI Signal Processing 6(3): 289-299 (1993) |
1990 |
1 | EE | Jef L. van Meerbergen,
Jos Huisken,
Paul E. R. Lippens,
O. McArdle,
R. Segers,
Gert Goossens,
J. Vanhoof,
Dirk Lanneer,
Francky Catthoor,
Hugo De Man:
An integrated automatic design system for complex DSP algorithms.
VLSI Signal Processing 1(4): 265-278 (1990) |