| 2008 |
|---|
| 21 | | Sungchan Park,
Intae Na,
Hong Jeong:
A Memory-efficient Parallel Architecture for Motion Estimation with Subpixel Resolution.
IPCV 2008: 465-471 |
| 20 | | Sungchan Park,
Chao Chen,
Hong Jeong:
Stereo Matching using FBP: A Memory Efficient Parallel Architecture.
IPCV 2008: 550-556 |
| 19 | EE | Sungchan Park,
Hong Jeong:
Trellis Based Real-Time Depth Perception Chip Using Interline Constraint.
New Directions in Intelligent Interactive Multimedia 2008: 565-575 |
| 2007 |
|---|
| 18 | EE | Youngmin Ha,
Hong Jeong:
An Automatic Method for Extracting and Classifying Defect in Optical Photomask Images.
MUE 2007: 710-716 |
| 17 | EE | Sungchan Park,
Hong Jeong:
Real-time Stereo Vision FPGA Chip with Low Error Rate.
MUE 2007: 751-756 |
| 16 | EE | Sungchan Park,
Chao Chen,
Hong Jeong:
VLSI Architecture for MRF Based Stereo Matching.
SAMOS 2007: 55-64 |
| 15 | EE | Yong Kim,
Hong Jeong:
A Systolic FPGA Architecture of Two-Level Dynamic Programming for Connected Speech Recognition.
IEICE Transactions 90-D(2): 562-568 (2007) |
| 2006 |
|---|
| 14 | EE | Yu Shiu,
Hong Jeong,
C. C. Jay Kuo:
Similar Segment Detection for Music Structure Analysis via Viterbi Algorithm.
ICME 2006: 789-792 |
| 13 | EE | Sungchan Park,
Hong Jeong:
A High-Speed Parallel Architecture for Stereo Matching.
ISVC (1) 2006: 334-342 |
| 12 | EE | Yong Kim,
Hong Jeong:
Two-Level Dynamic Programming Hardware Implementation for Real Time Processing.
KES (1) 2006: 1090-1097 |
| 2005 |
|---|
| 11 | | Hong Jeong,
Yong Kim:
A Parallel FPGA Architecture for Blind Separation of Speech Signals.
Artificial Intelligence and Applications 2005: 509-514 |
| 10 | | Hong Jeong,
Yong Kim:
A Systolic Architecture and FPGA Implementation of Blind Source Separation.
IC-AI 2005: 963-969 |
| 9 | EE | Yong Kim,
Hong Jeong:
A FPGA Architecture of Blind Source Separation and Real Time Implementation.
IWINAC (2) 2005: 347-356 |
| 8 | EE | Yong Kim,
Hong Jeong:
A Parallel Array Architecture of MIMO Feedback Network and Real Time Implementation.
KES (1) 2005: 996-1003 |
| 2004 |
|---|
| 7 | EE | Hong Jeong,
Sungchan Park:
Generalized Trellis Stereo Matching with Systolic Array.
ISPA 2004: 263-267 |
| 2003 |
|---|
| 6 | EE | Hong Jeong,
Yong Kim:
A Systolic Architecture of VLSI Implementation of Dynamic Time Warping for Speech Recognition.
SIP 2003: 109-114 |
| 2002 |
|---|
| 5 | EE | Hong Jeong,
Yuns Oh,
J. H. Park,
B. S. Koo,
Sang Wook Lee:
Vision-based adaptive and recursive tracking of unpaved roads.
Pattern Recognition Letters 23(1-3): 73-82 (2002) |
| 2001 |
|---|
| 4 | | Hong Jeong,
Yuns Oh:
A Parallel Real Time Implementation of Stereo Matching.
IPDPS 2001: 10 |
| 2000 |
|---|
| 3 | EE | Hong Jeong,
Yuns Oh:
Parallel Trellis Based Stereo Matching Using Constraints.
Biologically Motivated Computer Vision 2000: 227-237 |
| 2 | | Hong Jeong,
J. H. Park,
H. Y. Ryu,
J. B. Kwon,
Yuns Oh:
VLSI Implementation of SAR Data Correlator.
PDPTA 2000 |
| 1992 |
|---|
| 1 | EE | Hong Jeong,
C. I. Kim:
Adaptive Determination of Filter Scales for Edge Detection.
IEEE Trans. Pattern Anal. Mach. Intell. 14(5): 579-585 (1992) |
