PARELEC 2004:
Dresden,
Germany
2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany.
IEEE Computer Society 2004, ISBN 0-7695-2080-4 BibTeX
Invited Talks
Session A1:
Parallel System Architectures I
Session B1:
Design and Design Automation I
- Dirk Fimmel, Stefan Quitzk, Wolfgang Schwarz:
Large-Scale Tolerance Analysis.
33-38
Electronic Edition (link) BibTeX
- Jie Guo, Michael Hosemann, Gerhard Fettweis:
Employing Compilers for Determining Architectural Features of Application-Specific DSPs.
39-44
Electronic Edition (link) BibTeX
- Gordon Cichon, Pablo Robelly, Hendrik Seidel, Marcus Bronzel, Gerhard Fettweis:
Compiler Scheduling for STA-Processors.
45-50
Electronic Edition (link) BibTeX
- Daniel Matolin, Jörg Schreiter, Stefan Getzlaff, René Schüffny:
An Analog VLSI Pulsed Neural Network Implementation for Image Segmentation.
51-55
Electronic Edition (link) BibTeX
Session A2:
Methods for Parallelization
Session B2:
Methods for Automatic Parallelization
Session A3:
Specification and Modeling of Parallel Systems
Session B3:
Parallel System Architectures II
- Noboru Tanabe, Hironori Nakajo, Hirotaka Hakozaki, Masasige Nakatake, Yasunori Dohi, Hideharu Amano:
A New Memory Module for Memory Intensive Applications.
123-128
Electronic Edition (link) BibTeX
- Christian Sauer, Matthias Gries, José Ignacio Gómez, Scott J. Weber, Kurt Keutzer:
Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express.
129-134
Electronic Edition (link) BibTeX
- Rolf Hoffmann, Wolfgang Heenes, Mathias Halbach:
Implementation of the Massively Parallel Model GCA.
135-139
Electronic Edition (link) BibTeX
Session A4:
Numerical Methods for Parallel Processing I
Session B4:
Reconfigurable Computing I
Session A5:
Numerical Methods for Parallel Processing II
Session B5:
Embedded Multiprocessors (and Network Processors)
- Matthias Grünewald, Dinh Khoi Le, Uwe Kastens, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert, Adrian Slowik, Michael Thies:
Network Application Driven Instruction Set Extensions for Embedded Processing Clusters.
209-214
Electronic Edition (link) BibTeX
- Mathias Kortke, Jan Müller, Rainer Schaffer, Sebastian Siegel, Renate Merker, Jürgen Kelber:
A Parallel Hardware-Software System for Signal Processing Algorithms.
215-220
Electronic Edition (link) BibTeX
- Hendrik Seidel, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis:
Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver.
221-225
Electronic Edition (link) BibTeX
Session A6:
Fault-Tolerant and Evolutionary Systems
Session B6:
Reconfigurable Computing II
Session A7:
Parallel Software Environments I
Session B7:
Real Time Parallel Computing I
Session A8:
Parallel Software Environments II
Session B8:
Real Time Parallel Computing II
Posters
- Georgios Dimitriou, Constantine D. Polychronopoulos:
Loop Scheduling for Multithreaded Processors.
361-366
Electronic Edition (link) BibTeX
- Pawel Kaczmarek, Henryk Krawczyk:
Influence of Exception Handling on Distributed Applications.
367-371
Electronic Edition (link) BibTeX
- Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard Fettweis:
Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach.
372-375
Electronic Edition (link) BibTeX
- Erik Vonnahme, Björn Griese, Mario Porrmann, Ulrich Rückert:
Dynamic Reconfiguration of Real-Time Network Interfaces.
376-379
Electronic Edition (link) BibTeX
- Victor E. Malyshkin, I. Naumkin, N. Malyshkin, Vladimir D. Korneev, Michael Ostapkevich:
Digital Electromagnetic Model of the Power System: Parallel Implementation for Multicomputers.
380-385
Electronic Edition (link) BibTeX
- Marek Tudruj, Lukasz Masko:
Fine-Grain Numerical Computations in Dynamic SMP Clusters with Communication on the Fly.
386-389
Electronic Edition (link) BibTeX
- Pawel Czarnul, Arkadiusz Urbaniak, Marcin Fraczak, Maciej Dyczkowski, Bartlomiej Balcerek:
Towards Easy-to-Use Checkpointing of MPI Applications within CLUSTERIX.
390-393
Electronic Edition (link) BibTeX
- Octav Brudaru, Octavian Buzatu:
Distributed Genetic Algorithm for Finding Fuzzy Rational Approximators.
394-397
Electronic Edition (link) BibTeX
- Eryk Laskowski, Richard Olejnik, Bernard Toursel, Marek Tudruj:
Scheduling Byte Code-Defined Data Dependence Graphs of Object Oriented Programs.
398-401
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:32:33 2009
by Michael Ley (ley@uni-trier.de)
