| 2008 |
|---|
| 9 | EE | Pablo Robelly,
Gordon Cichon,
H. Ahlendorf,
Gerhard Fettweis:
A HW/SW design methodology for embedded SIMD vector signal processors.
IJES 3(3): 160-169 (2008) |
| 2006 |
|---|
| 8 | EE | Pablo Robelly,
Hendrik Seidel,
K. C. Chen,
Gerhard Fettweis:
Energy efficiency vs. programmability trade-off: architectures and design principles.
DATE 2006: 587-592 |
| 2005 |
|---|
| 7 | | Emil Matús,
Gordon Cichon,
Hendrik Seidel,
Pablo Robelly,
Torsten Limberg,
Gerhard Fettweis:
A Compiler-friendly and Low-power DSP architecture.
GI Jahrestagung (1) 2005: 459 |
| 6 | EE | Pablo Robelly,
A. Lehmann,
Gerhard Fettweis:
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures.
SAMOS 2005: 62-71 |
| 2004 |
|---|
| 5 | EE | Hendrik Seidel,
Gordon Cichon,
Pablo Robelly,
Marcus Bronzel,
Gerhard Fettweis:
Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver.
PARELEC 2004: 221-225 |
| 4 | EE | Pablo Robelly,
Gordon Cichon,
Hendrik Seidel,
Gerhard Fettweis:
Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach.
PARELEC 2004: 372-375 |
| 3 | EE | Gordon Cichon,
Pablo Robelly,
Hendrik Seidel,
Marcus Bronzel,
Gerhard Fettweis:
Compiler Scheduling for STA-Processors.
PARELEC 2004: 45-50 |
| 2 | EE | Gordon Cichon,
Pablo Robelly,
Hendrik Seidel,
Emil Matús,
Marcus Bronzel,
Gerhard Fettweis:
Synchronous Transfer Architecture (STA).
SAMOS 2004: 343-352 |
| 1 | EE | Hendrik Seidel,
Emil Matús,
Gordon Cichon,
Pablo Robelly,
Marcus Bronzel,
Gerhard Fettweis:
Generated DSP Cores for Implementation of an OFDM Communication System.
SAMOS 2004: 353-362 |
