Designing Correct Circuits 1992: Lyngby, Denmark

Jørgen Staunstrup, Robin Sharp (Eds.): Designing Correct Circuits, Proceedings of the Second IFIP WG10.2/WG10.5 Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January 1992. IFIP Transactions A-5 North-Holland 1992, ISBN 0-444-89335-0 BibTeX

@proceedings{DBLP:conf/ifip10-2/1992a,
  editor    = {J{\o}rgen Staunstrup and
               Robin Sharp},
  title     = {Designing Correct Circuits, Proceedings of the Second IFIP WG10.2/WG10.5
               Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8
               January 1992},
  booktitle = {Designing Correct Circuits},
  publisher = {North-Holland},
  series    = {IFIP Transactions},
  volume    = {A-5},
  year      = {1992},
  isbn      = {0-444-89335-0},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

James B. Saxe, Stephen J. Garland, John V. Guttag, James J. Horning: Using Transformations and Verification in Ciruit Design. 1-25 BibTeX
Jo C. Ebergen, Ad M. G. Peeters: Modulo-N Counters: Design and Analysis of Delay-Insensitive Circuits. 27-46 BibTeX
Michael Mendler, Terry Stroup: Newtonian Arbiters Cannot be Proven Correct. 47-66 BibTeX
Stefan Krischer: Incomplete TRS-Specifications of Boolean Functions and their Verification. 67-79 BibTeX
Ghislaine Thuau, Bachir Berkane: Using the Language Lustre for Sequential Circuit Verification. 81-96 BibTeX
Peter Naur: Invited talk: Three Notions of Proof. 97-101 BibTeX
Guy Durrieu, Kamel Kessaci, Michel Lemaître: Transe: An Experimental Transformation Assistant for Digital Circuit Design. 103-118 BibTeX
Satnam Singh: Circuit Analysis by Non-Standard Interpretation. 119-138 BibTeX
Björn Lisper, Sanjay V. Rajopadhye: Reasoning about Permutations in Regular Arrays. 139-157 BibTeX
Lars Rossen, Robin Sharp: Sequence Semantics of Ruby. 159-171 BibTeX
Diederik Verkest, Luc J. M. Claesen, Hugo De Man: A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU. 173-192 BibTeX
Jörg Bormann, H. Nusser-Wehlan, Gerd Venzl: Invited Talk: Formal Design in an Industrial Research Laboratory: Lessons and Perspectives. 193-213 BibTeX
Mark R. Greenstreet: Using Synchronized Transitions for Simulation and Timing Verification. 215-236 BibTeX
Scott F. Smith, Amy E. Zwarico: Provably Correct Synthesis of Asynchronous Circuits. 237-260 BibTeX
Mark B. Josephs, Rudolf H. Mak, Jan Tijmen Udding, Tom Verhoeff, Jelio T. Yantchev: High-Level Design of an Asynchronous Packet-Routing Chip. 261-274 BibTeX
Michael Kishinevsky, Alex Kondratyev, Alexander Taubin, Victor Varshavsky: Analysis and Identification of Self-Timed Circuits. 275-287 BibTeX