| 2006 |
|---|
| 11 | EE | Francesco Pessolano:
The Holy Grail of Holistic Low-Power Design.
PATMOS 2006: 671 |
| 2005 |
|---|
| 10 | EE | Nic Mokhoff,
Yervant Zorian,
Kamalesh N. Ruparel,
Hao Nham,
Francesco Pessolano,
Kee Sup Kim:
How to determine the necessity for emerging solutions.
DAC 2005: 274-275 |
| 9 | EE | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Limits to performance spread tuning using adaptive voltage and body biasing.
ISCAS (1) 2005: 5-8 |
| 8 | EE | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Glitch-free discretely programmable clock generation on chip.
ISCAS (2) 2005: 1839-1842 |
| 2004 |
|---|
| 7 | EE | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Technology exploration for adaptive power and frequency scaling in 90nm CMOS.
ISLPED 2004: 14-19 |
| 6 | EE | Francesco Pessolano,
R. I. M. P. Meijer:
A 260ps Quasi-static ALU in 90nm CMOS.
PATMOS 2004: 372-380 |
| 2003 |
|---|
| 5 | EE | G. Privitera,
Francesco Pessolano:
Analysis of High-Speed Logic Families.
PATMOS 2003: 2-10 |
| 2002 |
|---|
| 4 | EE | Francesco Pessolano,
Joep L. W. Kessels,
Ad M. G. Peeters:
MDSP: A High-Performance Low-Power DSP Architecture.
PATMOS 2002: 35-44 |
| 2000 |
|---|
| 3 | EE | Dave Protheroe,
Francesco Pessolano:
An Objective Measure of Digital System Design Quality.
ISQED 2000: 227-233 |
| 2 | EE | Francesco Pessolano,
Joep L. W. Kessels:
Asynchronous First-in First-out Queues.
PATMOS 2000: 178-186 |
| 1999 |
|---|
| 1 | EE | Francesco Pessolano:
Heterogeneous Clustered Processors: Organisation and Design.
Euro-Par 1999: 1296-1300 |
