| 2007 |
|---|
| 7 | EE | Takeshi Kumaki,
Tetsushi Koide,
Hans Jürgen Mattausch,
Yasuto Kuroda,
Hideyuki Noda,
Katsumi Dosaka,
Kazutami Arimoto,
Kazunori Saito:
Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine.
ISCAS 2007: 525-528 |
| 6 | EE | Takeshi Kumaki,
Yasuto Kuroda,
Masakatsu Ishizaki,
Tetsushi Koide,
Hans Jürgen Mattausch,
Hideyuki Noda,
Katsumi Dosaka,
Kazutami Arimoto,
Kazunori Saito:
Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer.
IEICE Transactions 90-D(1): 334-345 (2007) |
| 5 | EE | Takeshi Kumaki,
Yutaka Kono,
Masakatsu Ishizaki,
Tetsushi Koide,
Hans Jürgen Mattausch:
Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory.
IEICE Transactions 90-D(1): 346-354 (2007) |
| 4 | EE | Takeshi Kumaki,
Masakatsu Ishizaki,
Tetsushi Koide,
Hans Jürgen Mattausch,
Yasuto Kuroda,
Hideyuki Noda,
Katsumi Dosaka,
Kazutami Arimoto,
Kazunori Saito:
Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor.
IEICE Transactions 90-D(8): 1312-1315 (2007) |
| 2006 |
|---|
| 3 | EE | Takeshi Kumaki,
Y. Kouno,
Masakatsu Ishizaki,
Tetsushi Koide,
Hans Jürgen Mattausch:
Application of Multi-ported CAM for Parallel Coding.
APCCAS 2006: 1859-1862 |
| 2 | EE | Takeshi Kumaki,
Keisuke Iwai,
Takakazu Kurokawa:
A flexible multiport content-addressable memory.
Systems and Computers in Japan 37(11): 57-67 (2006) |
| 2005 |
|---|
| 1 | EE | Takeshi Kumaki,
Yasuto Kuroda,
Tetsushi Koide,
Hans Jürgen Mattausch,
Hideyuki Noda,
Katsumi Dosaka,
Kazutami Arimoto,
Kazunori Saito:
CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example].
ISCAS (5) 2005: 5202-5205 |
