| |
| 2005 | ||
|---|---|---|
| 2 | EE | T. Saito, M. Maeda, Tetsuo Hironaka, Kazuya Tanigawa, Tetsuya Sueyoshi, K. Aoyama, Tetsushi Koide, Hans Jürgen Mattausch: Design of superscalar processor with multi-bank register file. ISCAS (4) 2005: 3507-3510 |
| 2002 | ||
| 1 | EE | K. Aoyama: A reconfigurable logic circuit based on threshold elements with a controlled floating gate. ISCAS (5) 2002: 381-384 |
| 1 | Tetsuo Hironaka | [2] |
| 2 | Tetsushi Koide | [2] |
| 3 | M. Maeda | [2] |
| 4 | Hans Jürgen Mattausch | [2] |
| 5 | T. Saito | [2] |
| 6 | Tetsuya Sueyoshi | [2] |
| 7 | Kazuya Tanigawa | [2] |