| 2007 |
|---|
| 5 | EE | Hiroki Shimano,
Fukashi Morishita,
Katsumi Dosaka,
Kazutami Arimoto:
A Voltage Scalable Advanced DFM RAM with Accelerated Screening for Low Power SoC Platform.
IEICE Transactions 90-C(10): 1927-1935 (2007) |
| 4 | EE | Fukashi Morishita,
Hideyuki Noda,
Isamu Hayashi,
Takayuki Gyohten,
Mako Okamoto,
Takashi Ipposhi,
Shigeto Maegawa,
Katsumi Dosaka,
Kazutami Arimoto:
A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI.
IEICE Transactions 90-C(4): 765-771 (2007) |
| 2006 |
|---|
| 3 | EE | Takayuki Gyohten,
Fukashi Morishita,
Isamu Hayashi,
Mako Okamoto,
Hideyuki Noda,
Katsumi Dosaka,
Kazutami Arimoto,
Yasutaka Horiba:
An On-Chip Supply-Voltage Control System Considering PVT Variations for Worst-Caseless Lower Voltage SoC Design.
IEICE Transactions 89-C(11): 1519-1525 (2006) |
| 2 | EE | Hideyuki Noda,
Katsumi Dosaka,
Hans Jürgen Mattausch,
Tetsushi Koide,
Fukashi Morishita,
Kazutami Arimoto:
A Reliability-Enhanced TCAM Architecture with Associated Embedded DRAM and ECC.
IEICE Transactions 89-C(11): 1612-1619 (2006) |
| 2005 |
|---|
| 1 | EE | Akira Yamazaki,
Fukashi Morishita,
Naoya Watanabe,
Teruhiko Amano,
Masaru Haraguchi,
Hideyuki Noda,
Atsushi Hachisuka,
Katsumi Dosaka,
Kazutami Arimoto,
Setsuo Wake,
Hideyuki Ozaki,
Tsutomu Yoshihara:
A Study of Sense-Voltage Margins in Low-Voltage-Operating Embedded DRAM Macros.
IEICE Transactions 88-C(10): 2020-2027 (2005) |
