| 2003 |
|---|
| 5 | EE | Jaesik Lee,
Ki-Wook Kim,
Yoonjong Huh,
Peter Bendix,
Sung-Mo Kang:
Chip-level charged-device modeling and simulation in CMOS integrated circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(1): 67-81 (2003) |
| 2001 |
|---|
| 4 | | Jaesik Lee,
Yoonjong Huh,
Peter Bendix,
Sung-Mo Kang:
Understanding and Addressing the Noise Induced By Electrostatic Discharge in Multiple Power Supply Systems.
ICCD 2001: 406-414 |
| 3 | EE | Jaesik Lee,
Yoonjong Huh,
Peter Bendix,
Sung-Mo Kang:
Design-for-ESD-reliability for high-frequency I/O interface circuits in deep-submicron CMOS technology.
ISCAS (4) 2001: 746-749 |
| 2 | EE | Q. Li,
Yoonjong Huh,
Jau-Wen Chen,
Peter Bendix,
Sung-Mo Kang:
ESD design rule checker.
ISCAS (5) 2001: 499-502 |
| 1 | EE | Q. Li,
Yoonjong Huh,
Jau-Wen Chen,
Peter Bendix,
Sung-Mo Kang:
Full chip ESD design rule checking.
ISCAS (5) 2001: 503-506 |
