selected papers
Volume 28,
Number 1,
January 1984
Volume 28,
Number 2,
March 1984
Volume 28,
Number 4,
July 1984
- David R. Tryon, Fred M. Armstrong, Mark R. Reiter:
Statistical Failure Analysis of System Timing.
340-355 BibTeX
- Michael J. Flynn, Lee W. Hoevel:
Measures of Ideal Execution Architectures.
356-369 BibTeX
- Anthony Correale:
Design Considerations of a Static LSSD Polarity Hold Latch Pair.
370-378 BibTeX
- Richard E. Matick, Daniel T. Ling, Satish Gupta, Frederick Dill:
All Points Addressable Raster Display Memory.
379-392 BibTeX
- Daniel L. Ostapko:
A Mapping and Memory Chip Hardware which Provides Symmetric Reading/Writing of Horizontal and Vertical Lines.
393-398 BibTeX
- Jitendra V. Dave, Jenö Gazdag:
Reduction of Random Noise from Multiband Image Data Using Phase Relationships Among Their Fourier Coefficients.
399-411 BibTeX
- Donald L. Orth:
Empty Arrays in Extended APL.
412-427 BibTeX
- Mitsuru Ohba:
Software Reliability Analysis Models.
428-443 BibTeX
- Emil Hopner, Michael Allen Patten:
The Digital Data Exchange - A Space-Division Switching System.
444-453 BibTeX
- Sherri J. Gillespie:
Resist Profile Control in E-Beam Lithography.
454-460 BibTeX
- Charles H. Stapper:
Modeling of Defects in Integrated Circuit Photolithographic Patterns.
461-475 BibTeX
- Michael Held, Alan J. Hoffman, Ellis Lane Johnson, Philip Wolfe:
Aspects of the Traveling Salesman Problem.
476-486 BibTeX
Volume 28,
Number 5,
September 1984
Papers on Design Automation
- Richard L. Taylor:
A Software Architecture for a Mature Design Automation System.
501-512 BibTeX
- Ronald B. Capelli, George C. Sax:
A Device-Independent Graphics Package for CAD Applications.
512-523 BibTeX
- Walter H. Elder, Peter P. Zenewicz, Rita R. Alvarodiaz:
An Interactive System for VLSI Chip Physical Design.
524-537 BibTeX
- John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan:
LSS: A System for Production Logic Synthesis.
537-545 BibTeX
- James L. Gilkinson, Steven D. Lewis, Bruce B. Winter, Amir Hekmatpour:
Automated Technology Mapping.
546-556 BibTeX
- Leon I. Maissel, Hillel Ofek:
Hardware Design and Description Languages in IBM.
557-563 BibTeX
- Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Gabriel M. Silberman:
Using a Hardware Simulation Engine for Custom MOS Structured Designs.
564-571 BibTeX
- Rolf-Dieter Fiebrich, Yuh-Zen Liao, George M. Koppelman, Edward N. Adams:
PSI: A Symbolic Layout System.
572-580 BibTeX
- Peter W. Cook:
Constraint Solver for Generalized IC Layout.
581-589 BibTeX
- A. M. Barone, J. K. Morrell:
Custom Chip/Card Design System.
590-595 BibTeX
- Peter S. Hauge, Ellen J. Yoffa:
ACORN: A System for CVS Macro Design by Tree Placement and Tree Customization.
596-602 BibTeX
- Peter C. Elmendorf:
KWIRE: A Multiple-Technology, User-Reconfigurable Wiring Tool for VLSI.
603-612 BibTeX
- Ralph Linsker:
An Iterative-Improvement Penalty-Function-Driven Wire Routing System.
613-624 BibTeX
- D. Leet, P. Shearon, R. France:
A CMOS LSSD Test Generation System.
625-635 BibTeX
- Charles H. Stapper:
Yield Model for Fault Clusters Within Integrated Circuits.
636-640 BibTeX
Copyright © Sun May 17 00:00:08 2009
by Michael Ley (ley@uni-trier.de)
