2. CAV 1990:
New Brunswick,
NJ,
USA
Edmund M. Clarke, Robert P. Kurshan (Eds.):
Computer Aided Verification, 2nd International Workshop, CAV '90, New Brunswick, NJ, USA, June 18-21, 1990, Proceedings.
Lecture Notes in Computer Science 531 Springer 1991, ISBN 3-540-54477-1 BibTeX
@proceedings{DBLP:conf/cav/1990,
editor = {Edmund M. Clarke and
Robert P. Kurshan},
title = {Computer Aided Verification, 2nd International Workshop, CAV
'90, New Brunswick, NJ, USA, June 18-21, 1990, Proceedings},
booktitle = {CAV},
publisher = {Springer},
series = {Lecture Notes in Computer Science},
volume = {531},
year = {1991},
isbn = {3-540-54477-1},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
- Edmund M. Clarke:
Temporal Logic Model Checking: Two Techniques for Avoiding the State Explosion Problem.
1 BibTeX
1. Tools and Computation
- Hans Eveking:
Automatic Verification of Extensions of Hardware Descriptions.
2-12 BibTeX
- Gérard Berthelot, Colette Johnen, Laure Petrucci:
PAPETRI: Environment for the Analysis of Petri Nets.
13-22 BibTeX
- Olivier Coudert, Jean Christophe Madre, Christian Berthet:
Verifying Temporal Properties of Sequential Machines Without Building their State Diagrams.
23-32 BibTeX
- Randal E. Bryant, Carl-Johan H. Seger:
Formal Verification of Digital Circuits Using Symbolic Ternary System Models.
33-43 BibTeX
- Hiromi Hiraishi, Shintaro Meki, Kiyoharu Hamaguchi:
Vectorized Model Checking for Computation Tree Logic.
44-53 BibTeX
- Carl Pixley:
Introduction to a Computational Theory and Implementation of Sequential Hardware Equivalence.
54-64 BibTeX
- Valérie Roy, Robert de Simone:
Auto/Autograph.
65-75 BibTeX
- Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka:
A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio.
76-85 BibTeX
- Paolo Camurati, M. Gilli, Paolo Prinetto, Matteo Sonza Reorda:
The Use of Model Checking in ATPG for Sequential Circuits.
86-95 BibTeX
- Jean Christophe Lloret, Pierre Azéma, François Vernadat:
Compositional Design and Verification of Communication Protocols, Using Labelled Petri Nets.
96-105 BibTeX
- Linda A. Ness:
Issues Arising in the Analysis of L.0.
106-115 BibTeX
- Michel Langevin:
Automated RTL Verification Based on Predicate Calculus.
116-125 BibTeX
- Richard Lai, Ken R. Parker, Tharam S. Dillon:
On Using Protean To Verify ISO FTAM Protocol.
126-135 BibTeX
- E. Allen Emerson, Aloysius K. Mok, A. Prasad Sistla, Jai Srinivasan:
Quantitative Temporal Reasoning.
136-145 BibTeX
2. Partial Orders
3. Reduction in Finite State Systems
4. Automaton Models
5. Model Synthesis
6. Theorem-Provers
7. Process Algebra
Copyright © Sat May 16 23:00:36 2009
by Michael Ley (ley@uni-trier.de)
