| 2009 |
|---|
| 36 | EE | Peter Kornerup,
Paolo Montuschi,
Jean-Michel Muller,
Eric Schwarz:
Guest Editors' Introduction: Special Section on Computer Arithmetic.
IEEE Trans. Computers 58(2): 145-147 (2009) |
| 2007 |
|---|
| 35 | EE | Peter Kornerup,
Vincent Lefèvre,
Jean-Michel Muller:
Computing Integer Powers in Floating-Point Arithmetic
CoRR abs/0705.4369: (2007) |
| 2006 |
|---|
| 34 | EE | Peter Kornerup,
Jean-Michel Muller:
Leading Guard Digits in Finite Precision Redundant Representations.
IEEE Trans. Computers 55(5): 541-548 (2006) |
| 33 | EE | Peter Kornerup,
Jean-Michel Muller:
Choosing starting values for certain Newton-Raphson iterations.
Theor. Comput. Sci. 351(1): 101-110 (2006) |
| 2005 |
|---|
| 32 | EE | Peter Kornerup,
David W. Matula:
Single Precision Reciprocals by Multipartite Table Lookup.
IEEE Symposium on Computer Arithmetic 2005: 240-248 |
| 31 | EE | Peter Kornerup:
Digit Selection for SRT Division and Square Root.
IEEE Trans. Computers 54(3): 294-303 (2005) |
| 30 | EE | Nicolas Brisebarre,
David Defour,
Peter Kornerup,
Jean-Michel Muller,
Nathalie Revol:
A New Range-Reduction Algorithm.
IEEE Trans. Computers 54(3): 331-339 (2005) |
| 29 | EE | Peter Kornerup:
Reviewing 4-to-2 Adders for Multi-Operand Addition.
VLSI Signal Processing 40(1): 143-152 (2005) |
| 2003 |
|---|
| 28 | EE | Peter Kornerup:
Revisiting SRT Quotient Digit Selection.
IEEE Symposium on Computer Arithmetic 2003: 38-45 |
| 27 | | Peter Kornerup,
Jean-Claude Bajard,
Christiane Frougny,
Jean-Michel Muller:
Preface.
Theor. Comput. Sci. 291(2): 133-134 (2003) |
| 2002 |
|---|
| 26 | EE | Peter Kornerup:
Reviewing 4-to-2 Adders for Multi-Operand Addition.
ASAP 2002: 218- |
| 2001 |
|---|
| 25 | EE | Jean-Claude Bajard,
Laurent-Stéphane Didier,
Peter Kornerup:
Modular Multiplication and Base Extensions in Residue Number Systems.
IEEE Symposium on Computer Arithmetic 2001: 59-65 |
| 2000 |
|---|
| 24 | EE | Israel Koren,
Peter Kornerup:
Guest Editors' Introduction - Special Issue on Computer Arithmetic.
IEEE Trans. Computers 49(7): 625-627 (2000) |
| 23 | EE | Feng Zhou,
Peter Kornerup:
Computing Moments by Prefix Sums.
VLSI Signal Processing 25(1): 5-17 (2000) |
| 1999 |
|---|
| 22 | EE | Peter Kornerup:
Necessary and Sufficient Conditions for Parallel, Constant Time Conversion and Addition.
IEEE Symposium on Computer Arithmetic 1999: 152- |
| 21 | EE | Asger Munk Nielsen,
Peter Kornerup:
Redundant Radix Representations of Rings.
IEEE Trans. Computers 48(11): 1153-1165 (1999) |
| 1998 |
|---|
| 20 | | Jean-Claude Bajard,
Laurent-Stéphane Didier,
Peter Kornerup:
An RNS Montgomery Modular Multiplication Algorithm.
IEEE Trans. Computers 47(7): 766-776 (1998) |
| 19 | EE | Feng Zhou,
Peter Kornerup:
A New Fast Discrete Fourier Transform.
VLSI Signal Processing 20(3): 219-232 (1998) |
| 1997 |
|---|
| 18 | EE | Jean-Claude Bajard,
Laurent-Stéphane Didier,
Peter Kornerup:
An IWS Montgomery Modular Multiplication Algorithm.
IEEE Symposium on Computer Arithmetic 1997: 234-239 |
| 17 | EE | Asger Munk Nielsen,
Peter Kornerup:
On Radix Representation of Rings.
IEEE Symposium on Computer Arithmetic 1997: 34-43 |
| 1995 |
|---|
| 16 | EE | Feng Zhou,
Peter Kornerup:
High Speed DCT/IDCT Using a Pipelined CORDIC Algorithm.
IEEE Symposium on Computer Arithmetic 1995: 180-187 |
| 15 | EE | Peter Kornerup,
David W. Matula:
LCF: A Lexicagraphic Binary representation of the Rationals.
J. UCS 1(7): 484-503 (1995) |
| 14 | EE | Asger Munk Nielsen,
Peter Kornerup:
MSB-First Digit Serial Arithmetic.
J. UCS 1(7): 527-547 (1995) |
| 1994 |
|---|
| 13 | | Peter Kornerup:
Digit-Set Conversions: Generalizations and Application.
IEEE Trans. Computers 43(5): 622-629 (1994) |
| 12 | | Peter Kornerup:
A Systolic, Linear-Array Multiplier for a Class of Right-Shift Algorithms.
IEEE Trans. Computers 43(8): 892-898 (1994) |
| 1993 |
|---|
| 11 | EE | Peter Kornerup:
High-radix modular multiplication for cryptosystems.
IEEE Symposium on Computer Arithmetic 1993: 277-283 |
| 1990 |
|---|
| 10 | | Peter Kornerup,
David W. Matula:
An Algorithm for Redundant Binary Bit-Pipelined Rational Arithmetic.
IEEE Trans. Computers 39(8): 1106-1115 (1990) |
| 1988 |
|---|
| 9 | | Peter Kornerup,
David W. Matula:
An On-Line Arithmetic Unit for Bit-Pipelined Rational Arithmetic.
J. Parallel Distrib. Comput. 5(3): 310-330 (1988) |
| 1985 |
|---|
| 8 | | David W. Matula,
Peter Kornerup:
Finite Precision Rational Arithmetic Slash Number Systems.
IEEE Trans. Computers 34(1): 3-18 (1985) |
| 1983 |
|---|
| 7 | | Peter Kornerup,
R. T. Gregory:
Mapping Integers and Hensel Codes onto Farey Fractions.
BIT 23(1): 9-20 (1983) |
| 6 | | Peter Kornerup,
David W. Matula:
Finite Precision Rational Arithmetic: An Arithmetic Unit.
IEEE Trans. Computers 32(4): 378-388 (1983) |
| 1980 |
|---|
| 5 | | Peter Kornerup:
Firmware Development Systems, a Survey.
Firmware Engineering 1980: 124-137 |
| 4 | | Peter Kornerup,
Bent Bruun Kristensen,
Ole Lehrmann Madsen:
Interpretation and Code Generation Based on Intermediate Languages.
Softw., Pract. Exper. 10(8): 635-658 (1980) |
| 1979 |
|---|
| 3 | | David W. Matula,
Peter Kornerup:
An approximate rational arithmetic system with intrinsic recovery of simple fractions during expression evaluation.
EUROSAM 1979: 383-397 |
| 1977 |
|---|
| 2 | | Peter Kornerup,
Bruce D. Shriver:
A Unified Numeric Representation Arithmetic Unit and Its Language Support.
IEEE Trans. Computers 26(7): 651-659 (1977) |
| 1974 |
|---|
| 1 | | Peter Kornerup:
Concepts of the MATHILDA System.
ISCA 1974: 159-164 |
