| 2007 |
|---|
| 22 | EE | Nikhil Kikkeri,
Peter-Michael Seidel:
An FPGA Implementation of a Fully Verified Double Precision IEEE Floating-Point Adder.
ASAP 2007: 83-88 |
| 21 | EE | Ronen Goldberg,
Guy Even,
Peter-Michael Seidel:
An FPGA implementation of pipelined multiplicative division with IEEE Rounding.
FCCM 2007: 185-196 |
| 2005 |
|---|
| 20 | EE | Nikhil Kikkeri,
Peter-Michael Seidel:
Formal Verification of Parametric Multiplicative Division Implementations.
ICCD 2005: 599-602 |
| 19 | EE | Nathaniel Ayewah,
Nikhil Kikkeri,
Peter-Michael Seidel:
Challenges in the Formal Verification of Complete State-of-the-Art Processors.
ICCD 2005: 603-608 |
| 18 | EE | Peter-Michael Seidel:
High-Radix Implementation of IEEE Floating-Point Addition.
IEEE Symposium on Computer Arithmetic 2005: 99-106 |
| 17 | EE | Peter-Michael Seidel,
Lee D. McFearin,
David W. Matula:
Secondary Radix Recodings for Higher Radix Multipliers.
IEEE Trans. Computers 54(2): 111-123 (2005) |
| 16 | EE | Guy Even,
Peter-Michael Seidel,
Warren E. Ferguson:
A parametric error analysis of Goldschmidt's division algorithm.
J. Comput. Syst. Sci. 70(1): 118-139 (2005) |
| 2004 |
|---|
| 15 | EE | Steven D. Krueger,
Peter-Michael Seidel:
Design of an On-Line IEEE Floating-Point Addition Unit for FPGAs.
FCCM 2004: 239-246 |
| 14 | EE | Nikhil Kikkeri,
Peter-Michael Seidel:
Formal Hardware Verification based on Signal Correlation Properties.
ICCD 2004: 402-408 |
| 13 | EE | Peter-Michael Seidel,
Kenneth Fazel:
Two-Dimensional Folding Strategies for Improved Layouts of Cyclic Shifters.
ISVLSI 2004: 277-278 |
| 12 | EE | Peter-Michael Seidel,
Guy Even:
Delay-Optimized Implementation of IEEE Floating-Point Addition.
IEEE Trans. Computers 53(2): 97-113 (2004) |
| 2003 |
|---|
| 11 | EE | Guy Even,
Peter-Michael Seidel:
Pipelined Multiplicative Division with IEEE Rounding.
ICCD 2003: 240- |
| 10 | EE | Guy Even,
Peter-Michael Seidel,
Warren E. Ferguson:
A Parametric Error Analysis of Goldschmidt?s Division Algorithm.
IEEE Symposium on Computer Arithmetic 2003: 165- |
| 2002 |
|---|
| 9 | EE | Wolfgang J. Paul,
Peter-Michael Seidel:
To Booth or not to Booth.
Integration 32(1-2): 5-40 (2002) |
| 2001 |
|---|
| 8 | EE | Peter-Michael Seidel,
Guy Even:
On the Design of Fast IEEE Floating-Point Adders.
IEEE Symposium on Computer Arithmetic 2001: 184-194 |
| 7 | EE | Peter-Michael Seidel,
Lee D. McFearin,
David W. Matula:
Binary Multiplication Radix-32 and Radix-256.
IEEE Symposium on Computer Arithmetic 2001: 23-32 |
| 6 | EE | Mark A. Hillebrand,
Thomas Schurger,
Peter-Michael Seidel:
How to Half Wire Lengths in the Layout of Cyclic Shifter.
VLSI Design 2001: 339-344 |
| 2000 |
|---|
| 5 | EE | Guy Even,
Peter-Michael Seidel:
A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication.
IEEE Trans. Computers 49(7): 638-650 (2000) |
| 4 | EE | Guy Even,
Silvia M. Müller,
Peter-Michael Seidel:
A dual precision IEEE floating-point multiplier.
Integration 29(2): 167-180 (2000) |
| 1999 |
|---|
| 3 | EE | Guy Even,
Peter-Michael Seidel:
A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication.
IEEE Symposium on Computer Arithmetic 1999: 225-232 |
| 2 | EE | Peter-Michael Seidel:
High-speed redundant reciprocal approximation.
Integration 28(1): 1-12 (1999) |
| 1998 |
|---|
| 1 | EE | Peter-Michael Seidel:
How to Half the Latency of IEEE Compliant Floating-Point Multiplication.
EUROMICRO 1998: 10329-10332 |
