| 2008 |
|---|
| 31 | EE | Álvaro Vázquez,
Elisardo Antelo:
New insights on Ling adders.
ASAP 2008: 227-232 |
| 30 | EE | Elisardo Antelo,
Julio Villalba,
Emilio L. Zapata:
A Low-Latency Pipelined 2D and 3D CORDIC Processors.
IEEE Trans. Computers 57(3): 404-417 (2008) |
| 2007 |
|---|
| 29 | EE | Álvaro Vázquez,
Elisardo Antelo,
Paolo Montuschi:
A radix-10 SRT divider based on alternative BCD codings.
ICCD 2007: 280-287 |
| 28 | EE | Álvaro Vázquez,
Elisardo Antelo,
Paolo Montuschi:
A New Family of High.Performance Parallel Decimal Multipliers.
IEEE Symposium on Computer Arithmetic 2007: 195-204 |
| 2005 |
|---|
| 27 | EE | Elisardo Antelo,
Tomás Lang,
Paolo Montuschi,
Alberto Nannarelli:
Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture.
IEEE Symposium on Computer Arithmetic 2005: 147-154 |
| 26 | EE | Elisardo Antelo,
Julio Villalba:
Low Latency Pipelined Circular CORDIC.
IEEE Symposium on Computer Arithmetic 2005: 280-287 |
| 25 | EE | Tomás Lang,
Elisardo Antelo:
High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics.
IEEE Trans. Computers 54(3): 347-361 (2005) |
| 24 | EE | Elisardo Antelo,
Tomás Lang,
Paolo Montuschi,
Alberto Nannarelli:
Digit-Recurrence Dividers with Reduced Logical Depth.
IEEE Trans. Computers 54(7): 837-851 (2005) |
| 2003 |
|---|
| 23 | EE | Tomás Lang,
Elisardo Antelo:
Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root.
IEEE Trans. Computers 52(9): 1100-1114 (2003) |
| 22 | EE | Álvaro Vázquez,
Elisardo Antelo:
Implementation of the Exponential Function in a Floating-Point Unit.
VLSI Signal Processing 33(1-2): 125-145 (2003) |
| 2002 |
|---|
| 21 | EE | Elisardo Antelo,
Tomás Lang,
Paolo Montuschi,
Alberto Nannarelli:
Fast Radix-4 Retimed Division with Selection by Comparisons.
ASAP 2002: 185-196 |
| 2001 |
|---|
| 20 | EE | Tomás Lang,
Elisardo Antelo:
Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation.
IEEE Symposium on Computer Arithmetic 2001: 83-93 |
| 2000 |
|---|
| 19 | EE | Elisardo Antelo,
Tomás Lang,
Javier D. Bruguera:
Very-High Radix Circular CORDIC: Vectoring and Unified Rotation/Vectoring.
IEEE Trans. Computers 49(7): 727-739 (2000) |
| 18 | EE | Tomás Lang,
Elisardo Antelo:
CORDIC-Based Computation of ArcCos.
VLSI Signal Processing 25(1): 19-38 (2000) |
| 17 | EE | Elisardo Antelo,
Tomás Lang,
Javier D. Bruguera:
Very-High Radix CORDIC Rotation Based on Selection by Rounding.
VLSI Signal Processing 25(2): 141-153 (2000) |
| 1999 |
|---|
| 16 | EE | Elisardo Antelo,
Tomás Lang,
Javier D. Bruguera:
Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding.
IEEE Symposium on Computer Arithmetic 1999: 204- |
| 1998 |
|---|
| 15 | | Elisardo Antelo,
Tomás Lang,
Javier D. Bruguera:
Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling.
IEEE Trans. Computers 47(2): 152-161 (1998) |
| 14 | | Tomás Lang,
Elisardo Antelo:
CORDIC Vectoring with Arbitrary Target Value.
IEEE Trans. Computers 47(7): 736-749 (1998) |
| 13 | EE | Elisardo Antelo,
Montserrat Bóo,
Javier D. Bruguera,
Emilio L. Zapata:
A novel design of a two operand normalization circuit.
IEEE Trans. VLSI Syst. 6(1): 173-176 (1998) |
| 12 | EE | Julio Villalba,
Emilio L. Zapata,
Elisardo Antelo,
Javier D. Bruguera:
Radix-4 Vectoring CORDIC Algorithm and Architectures.
VLSI Signal Processing 19(2): 127-147 (1998) |
| 1997 |
|---|
| 11 | EE | Tomás Lang,
Elisardo Antelo:
CORDIC-based computation of arccos and arcsin.
ASAP 1997: 132-143 |
| 10 | EE | Tomás Lang,
Elisardo Antelo:
CORDIC Vectoring with Arbitrary Target Value.
IEEE Symposium on Computer Arithmetic 1997: 108-115 |
| 9 | | Elisardo Antelo,
Javier D. Bruguera,
Tomás Lang,
Emilio L. Zapata:
Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm.
IEEE Trans. Computers 46(11): 1264-1271 (1997) |
| 8 | | Elisardo Antelo,
Julio Villalba,
Javier D. Bruguera,
Emilio L. Zapata:
High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm.
IEEE Trans. Computers 46(8): 855-870 (1997) |
| 1996 |
|---|
| 7 | EE | Julio Villalba,
J. C. Arrabal,
Emilio L. Zapata,
Elisardo Antelo,
Javier D. Bruguera:
Radix-4 Vectoring Cordic Algorithm And Architectures.
ASAP 1996: 55-64 |
| 6 | | Elisardo Antelo,
Javier D. Bruguera,
Tomás Lang,
Julio Villalba,
Emilio L. Zapata:
High Radix Cordic Rotation Based on Selection by Rounding.
Euro-Par, Vol. II 1996: 155-164 |
| 5 | | Elisardo Antelo,
Javier D. Bruguera,
Emilio L. Zapata:
Unified Mixed Radix 2-4 Redundant CORDIC Processor.
IEEE Trans. Computers 45(9): 1068-1073 (1996) |
| 1995 |
|---|
| 4 | EE | Roberto R. Osorio,
Elisardo Antelo,
Javier D. Bruguera,
Julio Villalba,
Emilio L. Zapata:
Digit On-line Large Radix CORDIC Rotator.
ASAP 1995: 246-257 |
| 3 | EE | Julio Villalba,
J. A. Hidalgo,
Emilio L. Zapata,
Elisardo Antelo,
Javier D. Bruguera:
CORDIC Architectures with Parallel Compensation of the Scale Factor.
ASAP 1995: 258-269 |
| 2 | EE | Elisardo Antelo,
Javier D. Bruguera,
Julio Villalba,
Emilio L. Zapata:
Redundant CORDIC Rotator Based on Parallel Prediction.
IEEE Symposium on Computer Arithmetic 1995: 172-179 |
| 1993 |
|---|
| 1 | | Javier D. Bruguera,
Elisardo Antelo,
Emilio L. Zapata:
Design of a Pipelined Radix 4 CORDIC Processor.
Parallel Computing 19(7): 729-744 (1993) |
