International Journal of Embedded Systems, Volume 3

Volume 3, Number 1/2, 2007

• Christian W. Probst, Ulrich Kremer, Luca Benini, Peter Schelkens:
  Power-aware computing systems. 3-7
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• Jerry Hom, Ulrich Kremer:
  Inter-program optimisations for disk energy reduction. 8-16
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• Vasanth Venkatachalam, Michael Franz, Christian W. Probst:
  A new way of estimating compute-boundedness and its application to dynamic voltage scaling. 17-30
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• Chunling Hu, Daniel A. Jiménez, Ulrich Kremer:
  An evaluation infrastructure for power and energy optimisations. 31-42
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• Giacomo Paci, Francesco Poletti, Luca Benini, Paul Marchal:
  Exploring temperature-aware design in low-power MPSoCs. 43-51
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• Aman Gayasen, Suresh Srinivasan, Narayanan Vijaykrishnan, Mahmut T. Kandemir:
  Design of power-aware FPGA fabrics. 52-64
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• Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, Rami G. Melhem:
  Power management in external memory using PA-CDRAM. 65-72
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• José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest:
  Energy-aware compilation and hardware design for VLIW embedded systems. 73-82
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• Gaurav Singh, Sandeep K. Shukla:
  Algorithms for low power hardware synthesis from Concurrent Action Oriented Specifications (CAOS). 83-92
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• Matthias Grumer, Christian Steger, Manuel Wendt, Andreas Mühlberger, Ulrich Neffe:
  Horizontal and vertical HW/SW co-design flows for power aware smart card designs. 93-106
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Volume 3, Number 3, 2008

• Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr:
  SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends. 109-118
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• Jong-eun Lee, Kiyoung Choi, Nikil Dutt:
  Evaluating memory architectures for media applications on Coarse-grained Reconfigurable Architectures. 119-127
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• Vikram Chandrasekhar, Frank Livingston, Joseph R. Cavallaro:
  Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers. 128-140
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• Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero:
  Power-efficient VLIW design using clustering and widening. 141-149
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• Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr:
  Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. 150-159
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• Pablo Robelly, Gordon Cichon, H. Ahlendorf, Gerhard Fettweis:
  A HW/SW design methodology for embedded SIMD vector signal processors. 160-169
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• Steven Derrien, Alexandru Turjan, Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
  Deriving efficient control in Process Networks with Compaan/Laura. 170-180
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• Andy D. Pimentel:
  The Artemis workbench for system-level performance evaluation of embedded systems. 181-196
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