| 2008 |
|---|
| 10 | EE | Hristo Nikolov,
Mark Thompson,
Todor Stefanov,
Andy D. Pimentel,
Simon Polstra,
R. Bose,
Claudiu Zissulescu,
Ed F. Deprettere:
Daedalus: toward composable multimedia MP-SoC design.
DAC 2008: 574-579 |
| 9 | EE | Steven Derrien,
Alexandru Turjan,
Claudiu Zissulescu,
Bart Kienhuis,
Ed F. Deprettere:
Deriving efficient control in Process Networks with Compaan/Laura.
IJES 3(3): 170-180 (2008) |
| 2007 |
|---|
| 8 | EE | Ming-Yung Ko,
Claudiu Zissulescu,
Sebastian Puthenpurayil,
Shuvra S. Bhattacharyya,
Bart Kienhuis,
Ed F. Deprettere:
Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation.
IEEE Transactions on Signal Processing 55(6-2): 3126-3138 (2007) |
| 2006 |
|---|
| 7 | EE | Ming-Yung Ko,
Claudiu Zissulescu,
Sebastian Puthenpurayil:
Parameterized Looped Schedules for Compact Representationof Execution Sequences.
ASAP 2006: 223-230 |
| 2005 |
|---|
| 6 | EE | Claudiu Zissulescu,
Bart Kienhuis,
Ed F. Deprettere:
Expression Synthesis in Process Networks generated by LAURA.
ASAP 2005: 15-21 |
| 5 | | Claudiu Zissulescu,
Bart Kienhuis,
Ed F. Deprettere:
Communication Synthesis in a multiprocessor environment.
FPL 2005: 360-365 |
| 4 | EE | Mihai-Lucian Cristea,
Claudiu Zissulescu,
Ed F. Deprettere,
Herbert Bos:
FPL-3E: Towards Language Support for Reconfigurable Packet Processing.
SAMOS 2005: 82-92 |
| 2004 |
|---|
| 3 | EE | Todor Stefanov,
Claudiu Zissulescu,
Alexandru Turjan,
Bart Kienhuis,
Ed F. Deprettere:
System Design Using Kahn Process Networks: The Compaan/Laura Approach.
DATE 2004: 340-345 |
| 2 | EE | Claudiu Zissulescu,
Bart Kienhuis,
Ed F. Deprettere:
Increasing Pipelined IP Core Utilization in Process Networks Using Exploration.
FPL 2004: 690-699 |
| 2003 |
|---|
| 1 | EE | Claudiu Zissulescu,
Todor Stefanov,
Bart Kienhuis,
Ed F. Deprettere:
Laura: Leiden Architecture Research and Exploration Tool.
FPL 2003: 911-920 |
