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Kenneth D. Wagner

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2005
12EEKenneth D. Wagner: Keeping current with silicon and systems technology in the mid-90s. IEEE Design & Test of Computers 22(1): 7-9 (2005)
1999
11 Kenneth D. Wagner: Robust Scan-Based Logic Test in VDSM Technologies. IEEE Computer 32(11): 66-74 (1999)
1998
10EESujit Dey, Anand Raghunathan, Kenneth D. Wagner: Design for Testability Techniques at the Behavioral and Register-Transfer Levels. J. Electronic Testing 13(2): 79-91 (1998)
1996
9EEKenneth D. Wagner, Sujit Dey: High-Level Synthesis for Testability: A Survey and Perspective. DAC 1996: 131-136
8 Kenneth D. Wagner, Yervant Zorian: EIC Message. IEEE Design & Test of Computers 13(2): 2- (1996)
1993
7 Kenneth D. Wagner, Bernd Könemann: Testable Programmable Digital Clock Pulse Control Elements. ITC 1993: 902-909
1991
6 Kenneth D. Wagner, Thomas W. Williams: Enhancing Board Functional Self-Test by Concurrent Sampling. ITC 1991: 633-640
1990
5 Kenneth D. Wagner: Guest Editorial: The Many Faces of Test. IEEE Design & Test of Computers 7(4): 4- (1990)
1988
4 Kenneth D. Wagner, Thomas W. Williams: Design for Testability of Mixed Signal Integrated Circuits. ITC 1988: 823-828
3EEEdward J. McCluskey, Samy Makar, Samiha Mourad, Kenneth D. Wagner: Probability models for pseudorandom test sequences. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 68-74 (1988)
1987
2 Kenneth D. Wagner, Cary K. Chin, Edward J. McCluskey: Pseudorandom Testing. IEEE Trans. Computers 36(3): 332-343 (1987)
1985
1 Kenneth D. Wagner: The Error Latency of Delay Faults in Combinational and Sequential Circuits. ITC 1985: 334-341

Coauthor Index

1Cary K. Chin [2]
2Sujit Dey [9] [10]
3Bernd Könemann [7]
4Samy Makar [3]
5Edward J. McCluskey [2] [3]
6Samiha Mourad [3]
7Anand Raghunathan [10]
8Thomas W. Williams [4] [6]
9Yervant Zorian [8]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)