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Abdelmajid Bouajila

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2008
4 Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) 2008: 771-778
2006
3EEAbdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC 2006: 107-113
2 Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) 2006: 177-
1EEAbdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341

Coauthor Index

1Andreas Bernauer [1] [2] [3]
2Oliver Bringmann [1] [2] [3]
3Andreas Herkersdorf [1] [2] [3] [4]
4Wolfgang Rosenstiel [1] [2] [3]
5Walter Stechele [1] [2] [3] [4]
6Johannes Zeppenfeld [1] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)