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Johannes Zeppenfeld

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2008
6EEAndreas Lankes, Thomas Wild, Johannes Zeppenfeld: System Level Simulation of Autonomic SoCs with TAPES. ARCS 2008: 9-22
5 Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) 2008: 771-778
2007
4EEChristopher Claus, Johannes Zeppenfeld, Florian Helmut Müller, Walter Stechele: Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system. DATE 2007: 498-503
3EEAndreas Lankes, Thomas Wild, Johannes Zeppenfeld: Power Estimation of Time Variant SoCs with TAPES. DSD 2007: 261-264
2EEChristopher Claus, Florian Helmut Müller, Johannes Zeppenfeld, Walter Stechele: A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration. IPDPS 2007: 1-7
2006
1EEAbdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341

Coauthor Index

1Andreas Bernauer [1]
2Abdelmajid Bouajila [1] [5]
3Oliver Bringmann [1]
4Christopher Claus [2] [4]
5Andreas Herkersdorf [1] [5]
6Andreas Lankes [3] [6]
7Florian Helmut Müller [2] [4]
8Wolfgang Rosenstiel [1]
9Walter Stechele [1] [2] [4] [5]
10Thomas Wild [3] [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)