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Mateusz Majer

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2008
21EEJosef Angermeier, Ulrich Batzer, Mateusz Majer, Jürgen Teich, Christopher Claus, Walter Stechele: Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System. ARC 2008: 148-158
20EEJosef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, T. Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker: Fine grain reconfigurable architectures. FPL 2008: 348
19EESándor P. Fekete, Jan van der Veen, Ali Ahmadinia, Diana Göhringer, Mateusz Majer, Jürgen Teich: Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device. IEEE Trans. VLSI Syst. 16(9): 1210-1219 (2008)
2007
18EEMateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda: The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer. VLSI Signal Processing 47(1): 15-31 (2007)
17EEJosef Angermeier, Diana Göhringer, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: The Erlangen Slot Machine - A Platform for Interdisciplinary Research in Dynamically Reconfigurable Computing (ESM - Eine Hardware-Plattform für interdisziplinäre Forschung im Bereich des dynamischen rekonfigurierbaren Rechnens). it - Information Technology 49(3): 143- (2007)
2006
16 Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Jürgen Teich: A Flexible Reconfiguration Manager for the Erlangen Slot Machine. ARCS Workshops 2006: 183-194
15EEDiana Göhringer, Mateusz Majer, Jürgen Teich: Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine. Dynamically Reconfigurable Architectures 2006
14EEMateusz Majer: An FPGA-Based Dynamically Reconfigurable Platform: From Concept to Realization. FPL 2006: 1-2
13EESándor P. Fekete, Jan van der Veen, Mateusz Majer, Jürgen Teich: Minimizing Communication Cost for Reconfigurable Slot Modules. FPL 2006: 1-6
2005
12 Christophe Bobda, Ali Ahmadinia, Kurapati Rajesham, Mateusz Majer, Adronis Niyonkuru: Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs. ARCS Workshops 2005: 61-66
11 Jan van der Veen, Sándor P. Fekete, Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich: Defragmenting the Module Layout of a Partially Reconfigurable Device. ERSA 2005: 92-104
10EEChristophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform. FCCM 2005: 319-320
9 Christophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices. FPL 2005: 153-158
8 Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich: The Erlangen Slot Machine: Increasing Flexibility in FPGA-Based Reconfigurable Platforms. FPT 2005: 37-42
7EEAli Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices. IEEE International Workshop on Rapid System Prototyping 2005: 84-90
6EEMateusz Majer, Christophe Bobda, Ali Ahmadinia, Jürgen Teich: Packet Routing in Dynamically Changing Networks on Chip. IPDPS 2005
5EEAli Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices CoRR abs/cs/0503066: (2005)
4EEChristophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices CoRR abs/cs/0510039: (2005)
2004
3EETudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner: Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing. Conf. Computing Frontiers 2004: 404-418
2EEChristophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jürgen Teich: A Dynamic NoC Approach for Communication in Reconfigurable Devices. FPL 2004: 1032-1036
1EEAli Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich: Task scheduling for heterogeneous reconfigurable computers. SBCCI 2004: 22-27

Coauthor Index

1Ali Ahmadinia [1] [2] [4] [5] [6] [7] [8] [9] [10] [11] [12] [16] [18] [19]
2Josef Angermeier [17] [20] [21]
3Ulrich Batzer [21]
4Jürgen Becker [20]
5Bernd Bleisteiner [3]
6Christophe Bobda [1] [2] [4] [5] [6] [7] [8] [9] [10] [11] [12] [16] [18]
7Lars Braun [20]
8Christopher Claus [20] [21]
9Ji Ding [5] [7]
10Sándor P. Fekete [4] [5] [7] [9] [10] [11] [13] [17] [19]
11Manfred Glesner [3]
12Diana Göhringer [15] [17] [19]
13Philipp Graf [20]
14Thomas Haller [8] [10]
15Frank Hannig [11]
16Ulrich Heinkel [3]
17Andreas Herkersdorf [20]
18Michael Hübner [20]
19Dirk Koch [1] [2]
20André Linarth [8] [10]
21Enno Lübbers [20]
22Renate Merker [20]
23Tudor Murgan [3]
24Adronis Niyonkuru [12]
25Mihail Petrov [3]
26Marco Platzner [20]
27Jörg Pleickhardt [3]
28Kurapati Rajesham [12]
29Markus Rullmann [20]
30T. Schwalb [20]
31Walter Stechele [20] [21]
32Jürgen Teich [1] [2] [4] [5] [6] [7] [8] [9] [10] [11] [13] [15] [16] [17] [18] [19] [20] [21]
33Jan van der Veen [4] [5] [7] [9] [10] [11] [13] [17] [19]
34Peter Zipf [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)