| 1998 |
|---|
| 7 | EE | Gitanjali Swamy,
Stephen A. Edwards,
Robert K. Brayton:
Efficient Verification and Synthesis using Design Commonalities.
VLSI Design 1998: 542-551 |
| 1997 |
|---|
| 6 | EE | Gitanjali Swamy:
Formal Verification of Digital Systems.
VLSI Design 1997: 213-217 |
| 1996 |
|---|
| 5 | | Robert K. Brayton,
Gary D. Hachtel,
Alberto L. Sangiovanni-Vincentelli,
Fabio Somenzi,
Adnan Aziz,
Szu-Tsung Cheng,
Stephen A. Edwards,
Sunil P. Khatri,
Yuji Kukimoto,
Abelardo Pardo,
Shaz Qadeer,
Rajeev K. Ranjan,
Shaker Sarwary,
Thomas R. Shiple,
Gitanjali Swamy,
Tiziano Villa:
VIS: A System for Verification and Synthesis.
CAV 1996: 428-432 |
| 4 | | Robert K. Brayton,
Gary D. Hachtel,
Alberto L. Sangiovanni-Vincentelli,
Fabio Somenzi,
Adnan Aziz,
Szu-Tsung Cheng,
Stephen A. Edwards,
Sunil P. Khatri,
Yuji Kukimoto,
Abelardo Pardo,
Shaz Qadeer,
Rajeev K. Ranjan,
Shaker Sarwary,
Thomas R. Shiple,
Gitanjali Swamy,
Tiziano Villa:
VIS.
FMCAD 1996: 248-256 |
| 1995 |
|---|
| 3 | EE | Gitanjali Swamy,
Robert K. Brayton,
Vigyan Singhal:
Incremental methods for FSM traversal.
ICCD 1995: 590- |
| 1994 |
|---|
| 2 | EE | Gitanjali Swamy,
Robert K. Brayton:
Incremental formal design verification.
ICCAD 1994: 458-465 |
| 1 | | Adnan Aziz,
Vigyan Singhal,
Gitanjali Swamy,
Robert K. Brayton:
Minimizing Interacting Finite State Machines: A Compositional Approach to Language to Containment.
ICCD 1994: 255-261 |
