John V. McCanny

2008
38	EE	Yingxi Lu, Maire P. O'Neill, John V. McCanny: Differential Power Analysis of a SHACAL-2 hardware implementation. ISCAS 2008: 2933-2936
37	EE	Liang Lu, John V. McCanny, Sakir Sezer: Multi-standard sub-pixel interpolation architecture for video Motion Estimation. SoCC 2008: 229-232
36	EE	Xin Yang, Jun Mu, Sakir Sezer, John V. McCanny, Earl E. Swartzlander Jr.: High performance IP lookup circuit using DDR SDRAM. SoCC 2008: 371-374
35	EE	Yen-Kuang Chen, David W. Lin, John V. McCanny, Edwin Hsing-Mean Sha: Guest Editorial: Special Issue on Design and Programming of Signal Processors for Multimedia Communication. Signal Processing Systems 51(3): 207-208 (2008)
34	EE	Roger F. Woods, John V. McCanny, John G. McWhirter: From Bit Level Systolic Arrays to HDTV Processor Chips. Signal Processing Systems 53(1-2): 35-49 (2008)
2007
33	EE	Liang Lu, John V. McCanny, Sakir Sezer: Systolic Array Based Architecture for Variable Block-Size Motion Estimation. AHS 2007: 160-168
32	EE	Xin Yang, Sakir Sezer, John V. McCanny, Dwayne Burns: Novel Content Addressable Memory Architecture for Adaptive Systems. AHS 2007: 633-640
31	EE	Liang Lu, John V. McCanny, Sakir Sezer: Reconfigurable Motion Estimation Architecture for Multi-standard Video Compression. ASAP 2007: 253-259
2006
30	EE	Friederich Kupzog, Holger Blume, Tobias G. Noll, Kieran McLaughlin, Sakir Sezer, John V. McCanny: Design and Analysis of Matching Circuit Architectures for a Closest Match Lookup. AICT/ICIW 2006: 56
29	EE	John V. McCanny, Roger F. Woods, John G. McWhirter: From Bit Level Systolic Arrays to HDTV Processor Chips. ASAP 2006: 159-162
28	EE	Neil Smyth, Máire McLoone, John V. McCanny: An Adaptable And Scalable Asymmetric Cryptographic Processor. ASAP 2006: 341-346
27	EE	Kieran McLaughlin, Friederich Kupzog, Holger Blume, Sakir Sezer, Tobias G. Noll, John V. McCanny: Design and analysis of matching circuit architectures for a closest match lookup. IPDPS 2006
2005
26		Ciaran McIvor, Máire McLoone, John V. McCanny: High-Radix Systolic Modular Multiplication on Reconfigurable Hardware. FPT 2005: 13-18
2004
25	EE	Ciaran McIvor, Máire McLoone, John V. McCanny: FPGA Montgomery Multiplier Architectures - A Comparison. FCCM 2004: 279-282
24	EE	Ciaran McIvor, Máire McLoone, John V. McCanny: FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p). ISCAS (3) 2004: 509-512
2003
23	EE	Zhaohui Liu, Kevin Dickson, John V. McCanny: A floating-point CORDIC based SVD processor. ASAP 2003: 194-203
22	EE	Swee Yeow, John V. McCanny: A VLSI Architecture for Advanced Video Coding Motion Estimation. ASAP 2003: 293-
21	EE	Máire McLoone, John V. McCanny: Very High Speed 17 Gbps SHACAL Encryption Architecture. FPL 2003: 111-120
20	EE	Ciaran McIvor, Máire McLoone, John V. McCanny: A high-speed, low latency RSA decryption silicon core. ISCAS (4) 2003: 133-136
19	EE	Máire McLoone, John V. McCanny: Rijndael FPGA Implementations Utilising Look-Up Tables. VLSI Signal Processing 34(3): 261-275 (2003)
2001
18	EE	Máire McLoone, John V. McCanny: High Performance Single-Chip FPGA Rijndael Algorithm Implementations. CHES 2001: 65-76
17	EE	Máire McLoone, John V. McCanny: Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm. FPL 2001: 152-161
16	EE	Paul McCanny, Shahid Masud, John V. McCanny: An efficient architecture for the 2-D biorthogonal discrete wavelet transform. ICIP (3) 2001: 314-317
15	EE	Shahid Masud, John V. McCanny: Design of Silicon IP Cores for Biorthogonal Wavelet Transforms. VLSI Signal Processing 29(3): 179-196 (2001)
2000
14	EE	Gaye Lightbody, Richard Walke, Roger Woods, John V. McCanny: Linear QR Architecture for a Single Chip Adaptive Beamformer. VLSI Signal Processing 24(1): 67-81 (2000)
1998
13	EE	Shahid Masud, John V. McCanny: Rapid Design of Discrete Orthonormal Wavelet Transforms. International Workshop on Rapid System Prototyping 1998: 142-
1997
12	EE	David W. Trainor, Roger F. Woods, John V. McCanny: Architectural Synthesis of Digital Signal Processing Algorithms Using "IRIS". VLSI Signal Processing 16(1): 41-55 (1997)
1996
11	EE	Colin C. W. Hui, Tiong Jiu Ding, John V. McCanny, Roger F. Woods: A New FFT Architecture and Chip Design for Motion Compensation based on Phase Correlation. ASAP 1996: 83-92
1995
10		Stephen E. McQuillan, John V. McCanny: A Systematic Methodology for the Design of High Performance Recursive Digital Filters. IEEE Trans. Computers 44(8): 971-982 (1995)
9	EE	M. Yan, John V. McCanny, Y. Hu: VLSI architectures for vector quantization. VLSI Signal Processing 10(1): 5-23 (1995)
1994
8	EE	Stephen E. McQuillan, John V. McCanny: Fast VLSI algorithms for division and square root. VLSI Signal Processing 8(2): 151-168 (1994)
1993
7	EE	Stephen E. McQuillan, John V. McCanny, R. Hamill: New algorithms and VLSI architectures for SRT division and square root. IEEE Symposium on Computer Arithmetic 1993: 80-86
1992
6	EE	M. Yan, John V. McCanny: Systolic inner product arrays with automatic word rounding. VLSI Signal Processing 4(2-3): 227-242 (1992)
5	EE	Rajinder Jit Singh, John V. McCanny: High performance VLSI architecture for Wave Digital Filtering. VLSI Signal Processing 4(4): 269-278 (1992)
1991
4		John V. McCanny: On the use of most significant digit first arithmetic in the design of high performance DSP chips. Algorithms and Parallel VLSI Architectures 1991: 243-260
3		O. C. McNally, John V. McCanny, Roger F. Woods: Design of a Highly Pipelined 2nd Order IIR Filter Chip. VLSI 1991: 19-28
1990
2	EE	M. Yan, John V. McCanny: A bit-level systolic architecture for implementing a VQ tree search. VLSI Signal Processing 2(3): 149-158 (1990)
1989
1	EE	S. C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny: Bit-Level systolic architectures for high performance IIR filtering. VLSI Signal Processing 1(1): 9-24 (1989)

Coauthor Index

1	Holger Blume	[27] [30]
2	Dwayne Burns	[32]
3	Yen-Kuang Chen	[35]
4	Kevin Dickson	[23]
5	Tiong Jiu Ding	[11]
6	R. Hamill	[7]
7	Y. Hu	[9]
8	Colin C. W. Hui	[11]
9	S. C. Knowles	[1]
10	Friederich Kupzog	[27] [30]
11	Gaye Lightbody	[14]
12	David W. Lin	[35]
13	Zhaohui Liu	[23]
14	Liang Lu	[31] [33] [37]
15	Yingxi Lu	[38]
16	Shahid Masud	[13] [15] [16]
17	Paul McCanny	[16]
18	Ciaran McIvor	[20] [24] [25] [26]
19	Kieran McLaughlin	[27] [30]
20	Máire McLoone	[17] [18] [19] [20] [21] [24] [25] [26] [28]
21	O. C. McNally	[3]
22	Stephen E. McQuillan	[7] [8] [10]
23	John G. McWhirter	[1] [29] [34]
24	Jun Mu	[36]
25	Tobias G. Noll	[27] [30]
26	Maire P. O'Neill	[38]
27	Sakir Sezer	[27] [30] [31] [32] [33] [36] [37]
28	Edwin Hsing-Mean Sha	[35]
29	Rajinder Jit Singh	[5]
30	Neil Smyth	[28]
31	Earl E. Swartzlander Jr.	[36]
32	David W. Trainor	[12]
33	Richard Walke	[14]
34	Roger Woods (Roger F. Woods)	[1] [3] [11] [12] [14] [29] [34]
35	M. Yan	[2] [6] [9]
36	Xin Yang	[32] [36]
37	Swee Yeow	[22]

Colors in the list of coauthors