| 2008 |
| 39 | EE | Khalid Latif,
Moazzam Niazi,
Hannu Tenhunen,
Tiberiu Seceleanu,
Sakir Sezer:
Application development flow for on-chip distributed architectures.
SoCC 2008: 163-168 |
| 38 | EE | Liang Lu,
John V. McCanny,
Sakir Sezer:
Multi-standard sub-pixel interpolation architecture for video Motion Estimation.
SoCC 2008: 229-232 |
| 37 | EE | Xin Yang,
Jun Mu,
Sakir Sezer,
John V. McCanny,
Earl E. Swartzlander Jr.:
High performance IP lookup circuit using DDR SDRAM.
SoCC 2008: 371-374 |
| 36 | EE | Kieran McLaughlin,
Sakir Sezer,
Holger Blume,
Xin Yang,
Friederich Kupzog,
Tobias G. Noll:
A Scalable Packet Sorting Circuit for High-Speed WFQ Packet Scheduling.
IEEE Trans. VLSI Syst. 16(7): 781-791 (2008) |
| 2007 |
| 35 | EE | Liang Lu,
John V. McCanny,
Sakir Sezer:
Systolic Array Based Architecture for Variable Block-Size Motion Estimation.
AHS 2007: 160-168 |
| 34 | EE | Ciaran Toal,
Dwayne Burns,
Kieran McLaughlin,
Sakir Sezer,
Stephen O'Kane:
An RLDRAM II Implementation of a 10Gbps Shared Packet Buffer for Network Processing.
AHS 2007: 613-618 |
| 33 | EE | Motasem Abdelghani,
Sakir Sezer,
Emi Garcia,
Jun Mu,
Ciaran Toal:
FPGA-Based Lookup Circuit for Session-Based IP Packet Classification.
AHS 2007: 619-624 |
| 32 | EE | Kieran McLaughlin,
Sakir Sezer:
High-Speed IP Address Lookups Using Hardware Based Tree Structures.
AHS 2007: 625-632 |
| 31 | EE | Xin Yang,
Sakir Sezer,
John V. McCanny,
Dwayne Burns:
Novel Content Addressable Memory Architecture for Adaptive Systems.
AHS 2007: 633-640 |
| 30 | EE | Liang Lu,
John V. McCanny,
Sakir Sezer:
Reconfigurable Motion Estimation Architecture for Multi-standard Video Compression.
ASAP 2007: 253-259 |
| 29 | EE | Dwayne Burns,
Ciaran Toal,
Kieran McLaughlin,
Sakir Sezer,
Mike Hutton,
Kevin Cackovic:
An FPGA Based Memory Efficient Shared Buffer Implementation.
FPL 2007: 661-664 |
| 2006 |
| 28 | EE | Stephen O'Kane,
Sakir Sezer,
Lum Soong Lit:
A Study of Shared Buffer Memory Segmentation for Packet Switched Networks.
AICT/ICIW 2006: 55 |
| 27 | EE | Friederich Kupzog,
Holger Blume,
Tobias G. Noll,
Kieran McLaughlin,
Sakir Sezer,
John V. McCanny:
Design and Analysis of Matching Circuit Architectures for a Closest Match Lookup.
AICT/ICIW 2006: 56 |
| 26 | EE | Kieran McLaughlin,
Niall O'Connor,
Sakir Sezer:
Exploring CAM Design For Network Processing Using FPGA Technology.
AICT/ICIW 2006: 84 |
| 25 | EE | Kieran McLaughlin,
Friederich Kupzog,
Holger Blume,
Sakir Sezer,
Tobias G. Noll,
John V. McCanny:
Design and analysis of matching circuit architectures for a closest match lookup.
IPDPS 2006 |
| 24 | EE | Ciaran Toal,
Sakir Sezer:
Investigation into programmability for layer 2 protocol frame delineation architectures.
IPDPS 2006 |
| 23 | EE | Ciaran Toal,
Sakir Sezer,
Xin Yang:
A VLSI GFP Frame Delineation Circuit.
ISVLSI 2006: 454-455 |
| 22 | EE | Colm McKillen,
Sakir Sezer,
Xin Yang:
High performance service-time-stamp computation for WFQ IP packet scheduling.
ISVLSI 2006: 65-70 |
| 2005 |
| 21 | EE | Kieran McLaughlin,
Stephen O'Kane,
Sakir Sezer:
Implementing High Speed IP Address Lookups in Hardware.
AICT/SAPIR/ELETE 2005: 140-144 |
| 20 | EE | Steven Walsh,
Emi Garcia,
Sakir Sezer:
Assessing the Impact of Rainfall on System Bandwidth for Broadband Fixed Wireless Applications.
AICT/SAPIR/ELETE 2005: 279-283 |
| 19 | EE | Motasem Abdelghani,
Sakir Sezer,
Emi Garcia,
Jun Mu:
Packet Classification Using Adaptive Rules Cutting (ARC).
AICT/SAPIR/ELETE 2005: 28-33 |
| 18 | EE | P. Moore,
Máire McLoone,
Sakir Sezer:
Reconfigurable Instruction Interface Architecture for Private-Key Cryptography on the Altera Nios-II Processor.
AICT/SAPIR/ELETE 2005: 296-299 |
| 17 | EE | Stephen O'Kane,
Colm McKillen,
Sakir Sezer:
The Design and Implementation of a Shared Packet Buffer Architecture for Fixed and Variable Sized Packets.
AICT/SAPIR/ELETE 2005: 352-356 |
| 16 | EE | Ciaran Toal,
Sakir Sezer:
A 10 Gbps GFP Frame Delineation Circuit with Single Bit Error Correction on an FPGA.
AICT/SAPIR/ELETE 2005: 357-362 |
| 2004 |
| 15 | EE | Ciaran Toal,
Sakir Sezer:
The Implementation of Scalable ATM Frame Delineation Circuits.
ICT 2004: 1047-1056 |
| 14 | EE | Stephen Dawson,
Sakir Sezer:
Web Based Service Provision - A Case Study: Electronic Design Automation.
ICT 2004: 1057-1066 |
| 13 | EE | V. Stewart,
C. F. N. Cowan,
Sakir Sezer:
Adaptive Echo Cancellation for Packet-Based Networks.
ICT 2004: 516-525 |
| 12 | EE | Emi Garcia-Palacios,
Sakir Sezer,
Ciaran Toal,
Stephen Dawson:
Implementation of a Novel Credit Based SCFQ Scheduler for Broadband Wireless Access.
ICT 2004: 876-884 |
| 11 | EE | Sakir Sezer,
Ciaran Toal,
Emi Garcia,
V. Stewart:
A Reconfigurable Tag Computation Architecture for Terabit Packet Scheduling.
IPDPS 2004 |
| 2003 |
| 10 | EE | Ciaran Toal,
Sakir Sezer,
Xing Yu:
A Pipelined SoPC Architecture for 2.5 Gbps Network Processing.
FCCM 2003: 271-272 |
| 9 | EE | Brendan McAllister,
Sakir Sezer,
Ciaran Toal:
Custom Tag Computation Circuit for a 10Gbps SCFQ Scheduler.
FPL 2003: 1149-1152 |
| 8 | EE | Ciaran Toal,
Sakir Sezer:
A Programmable and Highly Pipelined PPP Architecture for Gigabit IP over SDH/SONET.
IPDPS 2003: 179 |
| 7 | EE | Ciaran Toal,
Sakir Sezer:
A 32-Bit SoPC Implementation of a P5.
ISCC 2003: 504-507 |
| 6 | | Stephen Dawson,
Sakir Sezer:
A Framework for Remote EDA Tooling and Distributed Resource Management.
International Conference on Internet Computing 2003: 213-218 |
| 2001 |
| 5 | EE | Jean-Paul Heron,
Roger Woods,
Sakir Sezer,
Richard H. Turner:
Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead.
VLSI Signal Processing 28(1-2): 97-113 (2001) |
| 2000 |
| 4 | | Alan Marshall,
Emi Garcia-Palacios,
Sakir Sezer,
David Chieng:
Performance Analysis of Access Points In Cellular Wireless ATM Networks.
MMNS 2000: 31-44 |
| 1999 |
| 3 | EE | Richard H. Turner,
Roger Woods,
Sakir Sezer,
Jean-Paul Heron:
A Virtual Hardware Handler for RTR Systems.
FCCM 1999: 262-263 |
| 2 | | Alan Marshall,
Sakir Sezer:
The Influence of Cumulative Switch Delay in Multiple Service Class Networks.
IMSA 1999: 409-414 |
| 1998 |
| 1 | EE | Sakir Sezer,
Roger Woods,
Jean-Paul Heron,
Alan Marshall:
Fast Partial Reconfiguration for FCCMs.
FCCM 1998: 318-319 |