| 2007 |
|---|
| 6 | EE | Máire McLoone,
Ciaran McIvor:
High-speed & Low Area Hardware Architectures of the Whirlpool Hash Function.
VLSI Signal Processing 47(1): 47-57 (2007) |
| 2005 |
|---|
| 5 | | Ciaran McIvor,
Máire McLoone,
John V. McCanny:
High-Radix Systolic Modular Multiplication on Reconfigurable Hardware.
FPT 2005: 13-18 |
| 4 | | Máire McLoone,
Ciaran McIvor,
Aidan Savage:
High-Speed Hardware Architectures of the Whirlpool Hash Function.
FPT 2005: 147-162 |
| 2004 |
|---|
| 3 | EE | Ciaran McIvor,
Máire McLoone,
John V. McCanny:
FPGA Montgomery Multiplier Architectures - A Comparison.
FCCM 2004: 279-282 |
| 2 | EE | Ciaran McIvor,
Máire McLoone,
John V. McCanny:
FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p).
ISCAS (3) 2004: 509-512 |
| 2003 |
|---|
| 1 | EE | Ciaran McIvor,
Máire McLoone,
John V. McCanny:
A high-speed, low latency RSA decryption silicon core.
ISCAS (4) 2003: 133-136 |
