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David W. Trainor

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1998
4EERoger Woods, David W. Trainor, Jean-Paul Heron: Applying an XC6200 to Real-Time Image Processing. IEEE Design & Test of Computers 15(1): 30-38 (1998)
1997
3EERoger Woods, Stefan H.-M. Ludwig, Jean-Paul Heron, David W. Trainor, Stephan W. Gehring: FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again). FCCM 1997: 155-164
2EEDavid W. Trainor, Roger F. Woods, John V. McCanny: Architectural Synthesis of Digital Signal Processing Algorithms Using "IRIS". VLSI Signal Processing 16(1): 41-55 (1997)
1996
1 David W. Trainor, Roger Woods: Architectural Synthesis and Efficient Circuit Implementation for Field Programmable Gate Arrays. FPL 1996: 116-125

Coauthor Index

1Stephan W. Gehring [3]
2Jean-Paul Heron [3] [4]
3Stefan H.-M. Ludwig [3]
4John V. McCanny [2]
5Roger Woods (Roger F. Woods) [1] [2] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)