| 2008 |
|---|
| 5 | EE | Chin-Lung Su,
Chih-Wea Tsai,
Cheng-Wen Wu,
Chien-Chung Hung,
Young-Shying Chen,
Ding-Yeong Wang,
Yuan-Jen Lee,
Ming-Jer Kao:
Write Disturbance Modeling and Testing for MRAM.
IEEE Trans. VLSI Syst. 16(3): 277-288 (2008) |
| 2005 |
|---|
| 4 | EE | Chin-Lung Su,
Yi-Ting Yeh,
Cheng-Wen Wu:
An Integrated ECC and Redundancy Repair Scheme for Memory Reliability Enhancement.
DFT 2005: 81-92 |
| 2004 |
|---|
| 3 | EE | Rei-Fu Huang,
Chin-Lung Su,
Cheng-Wen Wu,
Shen-Tien Lin,
Kun-Lun Luo,
Yeong-Jar Chang:
Fail Pattern Identification for Memory Built-In Self-Repair.
Asian Test Symposium 2004: 366-371 |
| 2 | EE | Chin-Lung Su,
Rei-Fu Huang,
Cheng-Wen Wu,
Chien-Chung Hung,
Ming-Jer Kao,
Yeong-Jar Chang,
Wen Ching Wu:
MRAM Defect Analysis and Fault Modeli.
ITC 2004: 124-133 |
| 2003 |
|---|
| 1 | EE | Chin-Lung Su,
Rei-Fu Huang,
Cheng-Wen Wu:
A Processor-Based Built-In Self-Repair Design for Embedded Memories.
Asian Test Symposium 2003: 366-371 |
