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| 2008 | ||
|---|---|---|
| 2 | EE | Chin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Chien-Chung Hung, Young-Shying Chen, Ding-Yeong Wang, Yuan-Jen Lee, Ming-Jer Kao: Write Disturbance Modeling and Testing for MRAM. IEEE Trans. VLSI Syst. 16(3): 277-288 (2008) |
| 2004 | ||
| 1 | EE | Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu, Chien-Chung Hung, Ming-Jer Kao, Yeong-Jar Chang, Wen Ching Wu: MRAM Defect Analysis and Fault Modeli. ITC 2004: 124-133 |
| 1 | Yeong-Jar Chang | [1] |
| 2 | Young-Shying Chen | [2] |
| 3 | Rei-Fu Huang | [1] |
| 4 | Ming-Jer Kao | [1] [2] |
| 5 | Yuan-Jen Lee | [2] |
| 6 | Chin-Lung Su | [1] [2] |
| 7 | Chih-Wea Tsai | [2] |
| 8 | Ding-Yeong Wang | [2] |
| 9 | Cheng-Wen Wu | [1] [2] |
| 10 | Wen Ching Wu | [1] |