| 1996 |
|---|
| 17 | EE | Jong Won Park,
David T. Harper III:
An Efficient Memory System for the SIMD Construction of a Gaussian Pyramid.
IEEE Trans. Parallel Distrib. Syst. 7(8): 855-860 (1996) |
| 1994 |
|---|
| 16 | | David T. Harper III:
A Multiaccess Frame Buffer Architecture.
IEEE Trans. Computers 43(5): 618-622 (1994) |
| 1993 |
|---|
| 15 | | David T. Harper III,
David Tuma:
A Parallel Algorithm for Cache Miss Ratio Evaluation.
MASCOTS 1993: 79-82 |
| 14 | | David T. Harper III,
Yashodara Costa:
Analytical Estimation of Vector Access Performance in Parallel Memory Architectures.
IEEE Trans. Computers 42(5): 616-624 (1993) |
| 1992 |
|---|
| 13 | | Jong Won Park,
David T. Harper III:
Memory Architecture Support for the SIMD Construction of a Gaussian Pyramid.
SPDP 1992: 444-451 |
| 12 | | David T. Harper III:
Increased Memory Performance During Vector Accesses Through the use of Linear Address Transformations.
IEEE Trans. Computers 41(2): 227-230 (1992) |
| 1991 |
|---|
| 11 | EE | David T. Harper III:
Reducing Memory Contention in Shared Memory Multiprocessors.
ISCA 1991: 66-73 |
| 10 | | David T. Harper III,
Darel A. Linebarger:
Conflict-Free Vector Access Using a Dynamic Storage Scheme.
IEEE Trans. Computers 40(3): 276-283 (1991) |
| 9 | EE | David T. Harper III:
Block, Multistride Vector, and FFT Accesses in Parallel Memory Systems.
IEEE Trans. Parallel Distrib. Syst. 2(1): 43-51 (1991) |
| 1990 |
|---|
| 8 | | David T. Harper III,
J. Robert Jump:
Evaluation of Reduced Bandwidth Multistage Networks.
J. Parallel Distrib. Comput. 9(3): 304-311 (1990) |
| 1989 |
|---|
| 7 | | David T. Harper III:
Address Transformations to Increase Memory Performance.
ICPP (1) 1989: 237-241 |
| 6 | EE | David T. Harper III,
Darel A. Linebarger:
A Dynamic Storage Scheme for Conflict-Free Vector Access.
ISCA 1989: 72-77 |
| 1988 |
|---|
| 5 | | David T. Harper III,
Darel A. Linebarger:
Storage Schemes for Efficient Computation of a Radix 2 FFT in a Machine with Parallel Memories.
ICPP (1) 1988: 422-425 |
| 1987 |
|---|
| 4 | | David T. Harper III,
J. Robert Jump:
Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks.
ISCA 1987: 171-175 |
| 3 | | David T. Harper III,
J. Robert Jump:
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme.
IEEE Trans. Computers 36(12): 1440-1449 (1987) |
| 1986 |
|---|
| 2 | | David T. Harper III,
J. Robert Jump:
Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme.
ISCA 1986: 324-328 |
| 1984 |
|---|
| 1 | EE | J. Robert Jump,
J. D. Wise,
David T. Harper III:
An interleaved array-processing architecture.
AFIPS National Computer Conference 1984: 93-100 |
