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Gian Marco Bo

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2000
6EEFrancesco Diotalevi, Maurizio Valle, Gian Marco Bo, Daniele D. Caviglia: A VLSI Architecture for Weight Perturbation on Chip Learning Implementation. IJCNN (4) 2000: 219-226
5EEGian Marco Bo, Daniele D. Caviglia, Maurizio Valle: An On-Chip Learning Neural Network. IJCNN (4) 2000: 66-74
1999
4 Francesco Diotalevi, Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle: Evaluation and Validation of Local and Adaptive Weight Perturbation Learning Algorithms for Optical Characters Recognition Applications. IIA/SOCO 1999
1998
3EELuigi Raffo, Silvio P. Sabatini, Gian Marco Bo, Giacomo M. Bisio: Analog VLSI circuits as physical structures for perception in early visual tasks. IEEE Transactions on Neural Networks 9(6): 1483-1494 (1998)
1997
2 Giacomo M. Bisio, Gian Marco Bo, M. Confalone, Luigi Raffo, Silvio P. Sabatini, M. P. Zizola: An Analog VLSI Computational Engine for Early Vision Tasks. ICANN 1997: 1175-1180
1 Daniela Baratta, Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle, Giovanni Canepa, Riccardo Parenti, Carla Penno: A Hardware Implementation of Hierarchical Neural Networks for Real-Time Quality Contol Systems in Industrial Applications. ICANN 1997: 1229-1234

Coauthor Index

1Daniela Baratta [1]
2Giacomo M. Bisio [2] [3]
3Giovanni Canepa [1]
4Daniele D. Caviglia [1] [4] [5] [6]
5M. Confalone [2]
6Francesco Diotalevi [4] [6]
7Riccardo Parenti [1]
8Carla Penno [1]
9Luigi Raffo [2] [3]
10Silvio P. Sabatini [2] [3]
11Maurizio Valle [1] [4] [5] [6]
12M. P. Zizola [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)