| 2009 |
|---|
| 8 | EE | Sudeep Pasricha,
Young-Hwan Park,
Nikil D. Dutt,
Fadi J. Kurdahi:
System-level PVT variation-aware power exploration of on-chip communication architectures.
ACM Trans. Design Autom. Electr. Syst. 14(2): (2009) |
| 2008 |
|---|
| 7 | EE | Young-Hwan Park,
Sudeep Pasricha,
Fadi J. Kurdahi,
Nikil Dutt:
Methodology for multi-granularity embedded processor power model generation for an ESL design flow.
CODES+ISSS 2008: 255-260 |
| 6 | EE | Sudeep Pasricha,
Young-Hwan Park,
Fadi J. Kurdahi,
Nikil Dutt:
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures.
VLSI Design 2008: 363-370 |
| 2007 |
|---|
| 5 | EE | Kang Yi,
Shih-Yang Cheng,
Young-Hwan Park,
Fadi J. Kurdahi,
Ahmed M. Eltawil:
An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip Memories.
Asia-Pacific Computer Systems Architecture Conference 2007: 102-113 |
| 4 | EE | Young-Hwan Park,
Sudeep Pasricha,
Fadi J. Kurdahi,
Nikil Dutt:
System level power estimation methodology with H.264 decoder prediction IP case study.
ICCD 2007: 601-608 |
| 2006 |
|---|
| 3 | EE | Kang Yi,
Kyeong-Hoon Jung,
Shih-Yang Cheng,
Young-Hwan Park,
Fadi J. Kurdahi,
Ahmed M. Eltawil:
Design and Analysis of Low Power Image Filters Toward Defect-Resilient Embedded Memories for Multimedia SoCs.
Asia-Pacific Computer Systems Architecture Conference 2006: 295-308 |
| 2 | EE | Sudeep Pasricha,
Young-Hwan Park,
Fadi J. Kurdahi,
Nikil D. Dutt:
System-level power-performance trade-offs in bus matrix communication architecture synthesis.
CODES+ISSS 2006: 300-305 |
| 1 | EE | Fadi J. Kurdahi,
Ahmed M. Eltawil,
Young-Hwan Park,
Rouwaida Kanj,
Sani R. Nassif:
System-Level SRAM Yield Enhancement.
ISQED 2006: 179-184 |
