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Natalino G. Busá

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2003
5EEBart Mesman, Qin Zhao, Natalino G. Busá, Katarzyna Leijten-Nowak: Reconfigurable Instruction-Set Application-Tuning for DSP. Journal of Circuits, Systems, and Computers 12(3): 333-352 (2003)
2002
4EENatalino G. Busá, Ghiath Alkadi, Michael Verberne, Rafael Peset Llopis, Sethuraman Ramanatha: RAPIDO: A Modular, Multi-Board, Heterogeneous Multi-Processor, PCI Bus Based Prototyping Framework for the Validation of SoC VLSI Designs. IEEE International Workshop on Rapid System Prototyping 2002: 159-165
3EECarles Rodoreda Sala, Natalino G. Busá: A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor. ISSS 2002: 44-49
2001
2EEMarco Bekooij, Loek J. M. Engels, Albert van der Werf, Natalino G. Busá: Functional units with conditional input/output behavior in VLIW processors. DATE 2001: 822
2000
1EENatalino G. Busá, Albert van der Werf, Marco Bekooij: Scheduling Coarse-Grain Operations for VLIW Processors. ISSS 2000: 47-54

Coauthor Index

1Ghiath Alkadi [4]
2Marco Bekooij [1] [2]
3Loek J. M. Engels [2]
4Katarzyna Leijten-Nowak [5]
5Rafael Peset Llopis [4]
6Bart Mesman [5]
7Sethuraman Ramanatha [4]
8Carles Rodoreda Sala [3]
9Michael Verberne [4]
10Albert van der Werf [1] [2]
11Qin Zhao [5]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)