Hiroshi Kawaguchi

2009
34	EE	Shunsuke Okumura, Yusuke Iguchi, Shusuke Yoshimoto, Hidehiro Fujiwara, Hiroki Noguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 0.56-V 128kb 10T SRAM using column line assist (CLA) scheme. ISQED 2009: 659-663
33	EE	Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection. VLSI Design 2009: 295-300
2008
32	EE	Yuichiro Murachi, Kusuke Mizuno, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto: A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding. ISCAS 2008: 848-851
31	EE	Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto: Quality of a Bit (QoB): A New Concept in Dependable SRAM. ISQED 2008: 98-102
30	EE	Hidehiro Fujiwara, Koji Nii, Hiroki Noguchi, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto: Novel Video Memory Reduces 45% of Bitline Power Using Majority Logic and Data-Bit Reordering. IEEE Trans. VLSI Syst. 16(6): 620-627 (2008)
29	EE	Yuichiro Murachi, Yuki Fukuyama, Ryo Yamamoto, Junichi Miyakoshi, Hiroshi Kawaguchi, Hajime Ishihara, Masayuki Miyama, Yoshio Matsuda, Masahiko Yoshimoto: A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition. IEICE Transactions 91-C(4): 457-464 (2008)
28	EE	Yuichiro Murachi, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto: A Sub 100 mW H.264 MP@L4.1 Integer-Pel Motion Estimation Processor Core for MBAFF Encoding with Reconfigurable Ring-Connected Systolic Array and Segmentation-Free, Rectangle-Access Search-Window Buffer. IEICE Transactions 91-C(4): 465-478 (2008)
27	EE	Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Shunsuke Okumura, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing. IEICE Transactions 91-C(4): 543-552 (2008)
2007
26	EE	Kentaro Kawakami, Mitsuhiko Kuroda, Hiroshi Kawaguchi, Masahiko Yoshimoto: Power and Memory Bandwidth Reduction of an H.264/AVC HDTV Decoder LSI with Elastic Pipeline Architecture. ASP-DAC 2007: 292-297
25	EE	Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing. ISVLSI 2007: 107-112
24	EE	Hiroshi Kawaguchi, Danardono Dwi Antono, Takayasu Sakurai: Closed-Form Expressions for Crosstalk Noise and Worst-Case Delay on Capacitively Coupled Distributed RC Lines. IEICE Transactions 90-A(12): 2669-2681 (2007)
23	EE	Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: Area Comparison between 6T and 8T SRAM Cells in Dual-Vdd Scheme and DVS Scheme. IEICE Transactions 90-A(12): 2695-2702 (2007)
22	EE	Takashi Matsuda, Masumi Ichien, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto: Data Transmission Scheduling Based on RTS/CTS Exchange for Periodic Data Gathering Sensor Networks. IEICE Transactions 90-B(12): 3410-3418 (2007)
21	EE	Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: Area Optimization in 6T and 8T SRAM Cells Considering Vth Variation in Future Processes. IEICE Transactions 90-C(10): 1949-1956 (2007)
20	EE	Fayez Robert Saliba, Hiroshi Kawaguchi, Takayasu Sakurai: A Self-Alignment Row-by-Row Variable-VDD Scheme Reducing 90% of Active-Leakage Power in SRAM's. IEICE Transactions 90-C(4): 743-748 (2007)
2006
19	EE	Takafumi Aonishi, Takashi Matsuda, Shinji Mikami, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto: Impact of Aggregation Efficiency on GIT Routing forWireless Sensor Networks. ICPP Workshops 2006: 151-158
18	EE	Hidehiro Fujiwara, Koji Nii, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto: A two-port SRAM for real-time video processor saving 53% of bitline power with majority logic and data-bit reordering. ISLPED 2006: 61-66
17	EE	Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto, Tetsuro Matsuno: A Power- and Area-Efficient SRAM Core Architecture for Super-Parallel Video Processing. VLSI-SoC 2006: 192-197
16	EE	Kyeong-Sik Min, Hun-Dae Choi, H.-Y. Choi, Hiroshi Kawaguchi, Takayasu Sakurai: Leakage-suppressed clock-gating circuit with Zigzag Super Cut-off CMOS (ZSCCMOS) for leakage-dominant sub-70-nm and sub-1-V-V/sub DD/ LSIs. IEEE Trans. VLSI Syst. 14(4): 430-435 (2006)
15	EE	Danardono Dwi Antono, Kenichi Inagaki, Hiroshi Kawaguchi, Takayasu Sakurai: Simple Waveform Model of Inductive Interconnects by Delayed Quadratic Transfer Function with Application to Scaling Trend of Inductive Effects in VLSI's. IEICE Transactions 89-A(12): 3569-3578 (2006)
14	EE	Junichi Miyakoshi, Yuichiro Murachi, Tetsuro Matsuno, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masayuki Miyama, Masahiko Yoshimoto: A Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture. IEICE Transactions 89-A(12): 3623-3633 (2006)
13	EE	Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Kentaro Kawakami, Junichi Miyakoshi, Shinji Mikami, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 0.3-V Operating, Vth-Variation-Tolerant SRAM under DVS Environment for Memory-Rich SoC in 90-nm Technology Era and Beyond. IEICE Transactions 89-A(12): 3634-3641 (2006)
12	EE	Kentaro Kawakami, Jun Takemura, Mitsuhiko Kuroda, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 50% Power Reduction in H.264/AVC HDTV Video Decoder LSI by Dynamic Voltage Scaling in Elastic Pipeline. IEICE Transactions 89-A(12): 3642-3651 (2006)
11	EE	Shinji Mikami, Takafumi Aonishi, Hironori Yoshino, Chikara Ohta, Hiroshi Kawaguchi, Masahiko Yoshimoto: Aggregation Efficiency-Aware Greedy Incremental Tree Routing for Wireless Sensor Networks. IEICE Transactions 89-B(10): 2741-2751 (2006)
10	EE	Junichi Miyakoshi, Yuichiro Murachi, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto: A Power- and Area-Efficient SRAM Core Architecture with Segmentation-Free and Horizontal/Vertical Accessibility for Super-Parallel Video Processing. IEICE Transactions 89-C(11): 1629-1636 (2006)
9	EE	Canh Quang Tran, Hiroshi Kawaguchi, Takayasu Sakurai: Low-Power Low-Leakage FPGA Design Using Zigzag Power Gating, Dual-VTH/VDD and Micro-VDD-Hopping. IEICE Transactions 89-C(3): 280-286 (2006)
8	EE	Danardono Dwi Antono, Kenichi Inagaki, Hiroshi Kawaguchi, Takayasu Sakurai: Trends of On-Chip Interconnects in Deep Sub-Micron VLSI. IEICE Transactions 89-C(3): 392-394 (2006)
2005
7	EE	Canh Quang Tran, Hiroshi Kawaguchi, Takayasu Sakurai: More than two orders of magnitude leakage current reduction in look-up table for FPGAs. ISCAS (5) 2005: 4701-4704
6	EE	Hiroshi Kawaguchi, Youngsoo Shin, Takayasu Sakurai: /spl mu/ITRON-LP: power-conscious real-time OS based on cooperative voltage scaling for multimedia applications. IEEE Transactions on Multimedia 7(1): 67-74 (2005)
5	EE	Kyeong-Sik Min, Kouichi Kanda, Hiroshi Kawaguchi, Kenichi Inagaki, Fayez Robert Saliba, Hoon-Dae Choi, Hyun-Young Choi, Daejeong Kim, Dong Myong Kim, Takayasu Sakurai: Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's. IEICE Transactions 88-C(4): 760-767 (2005)
4	EE	Keisuke Toyama, Satoshi Misaka, Kazuo Aisaka, Toshiyuki Aritsuka, Kunio Uchiyama, Koichiro Ishibashi, Hiroshi Kawaguchi, Takayasu Sakurai: Frequency-voltage cooperative CPU power control: A design rule and its application by feedback prediction. Systems and Computers in Japan 36(6): 39-48 (2005)
2001
3	EE	Hiroshi Kawaguchi, Gang Zhang, Seongsoo Lee, Takayasu Sakurai: An LSI for VDD-hopping and MPEG4 system based on the chip. ISCAS (4) 2001: 918-921
1998
2		Hiroshi Kawaguchi, Takayasu Sakurai: Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines. ASP-DAC 1998: 35-43
1978
1		Kazuhide Sugawara, Hiroshi Kawaguchi, Teruyasu Nishizawa: "E-correctness" of a set of "computation processes". Mathematical Studies of Information Processing 1978: 282-301

Coauthor Index

1	Kazuo Aisaka	[4]
2	Danardono Dwi Antono	[8] [15] [24]
3	Takafumi Aonishi	[11] [19]
4	Toshiyuki Aritsuka	[4]
5	H.-Y. Choi	[16]
6	Hoon-Dae Choi	[5]
7	Hun-Dae Choi	[16]
8	Hyun-Young Choi	[5]
9	Hidehiro Fujiwara	[13] [18] [21] [23] [25] [27] [30] [31] [33] [34]
10	Yuki Fukuyama	[29]
11	Masaki Hamamoto	[14] [17] [28] [32]
12	Masumi Ichien	[22]
13	Yusuke Iguchi	[21] [23] [25] [27] [31] [33] [34]
14	Takahiro Iinuma	[14] [17] [28] [32]
15	Kenichi Inagaki	[5] [8] [15]
16	Koichiro Ishibashi	[4]
17	Hajime Ishihara	[29]
18	Tomokazu Ishihara	[10] [14] [17] [28] [32]
19	Tetsuya Kamino	[32]
20	Kouichi Kanda	[5]
21	Kentaro Kawakami	[12] [13] [26]
22	Daejeong Kim	[5]
23	Dong Myong Kim	[5]
24	Mitsuhiko Kuroda	[12] [26]
25	Jangchung Lee	[28] [32]
26	Seongsoo Lee	[3]
27	Takashi Matsuda	[19] [22]
28	Yoshio Matsuda	[29]
29	Tetsuro Matsuno	[14] [17]
30	Shinji Mikami	[11] [13] [19]
31	Kyeong-Sik Min	[5] [16]
32	Satoshi Misaka	[4]
33	Junichi Miyakoshi	[10] [13] [14] [17] [18] [28] [29] [30] [32]
34	Masayuki Miyama	[14] [29]
35	Kusuke Mizuno	[32]
36	Yasuhiro Morita	[13] [18] [21] [23] [25] [27] [30] [31]
37	Yuichiro Murachi	[10] [14] [17] [18] [28] [29] [30] [32]
38	Koji Nii	[13] [18] [21] [23] [25] [27] [30] [34]
39	Teruyasu Nishizawa	[1]
40	Hiroki Noguchi	[13] [21] [23] [25] [27] [30] [31] [33] [34]
41	Chikara Ohta	[11] [19] [22]
42	Shunsuke Okumura	[27] [31] [33] [34]
43	Takayasu Sakurai	[2] [3] [4] [5] [6] [7] [8] [9] [15] [16] [20] [24]
44	Fayez Robert Saliba	[5] [20]
45	Youngsoo Shin	[6]
46	Kazuhide Sugawara	[1]
47	Jun Takemura	[12]
48	Keisuke Toyama	[4]
49	Canh Quang Tran	[7] [9]
50	Kunio Uchiyama	[4]
51	Ryo Yamamoto	[29]
52	Fang Yin	[28] [32]
53	Masahiko Yoshimoto	[10] [11] [12] [13] [14] [17] [18] [19] [21] [22] [23] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34]
54	Shusuke Yoshimoto	[34]
55	Hironori Yoshino	[11]
56	Gang Zhang	[3]

Colors in the list of coauthors