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Alexander Viehl

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2008
6EEJürgen Schnerr, Oliver Bringmann, Alexander Viehl, Wolfgang Rosenstiel: High-performance timing simulation of embedded software. DAC 2008: 290-295
5EEAlexander Viehl, Björn Sander, Oliver Bringmann, Wolfgang Rosenstiel: Integrated Requirement Evaluation of Non-Functional System-on-Chip Properties. FDL 2008: 105-110
2007
4EEAxel Siebenborn, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel: Control-Flow Aware Communication and Conflict Analysis of Parallel Processes. ASP-DAC 2007: 32-37
3EEAlexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel: Probabilistic performance risk analysis at system-level. CODES+ISSS 2007: 185-190
2EEAlexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel: A Hybrid Approach for System-Level Design Evaluation. IESS 2007: 165-178
2006
1EEAlexander Viehl, Timo Schönwald, Oliver Bringmann, Wolfgang Rosenstiel: Formal performance analysis and simulation of UML/SysML models for ESL design. DATE 2006: 242-247

Coauthor Index

1Oliver Bringmann [1] [2] [3] [4] [5] [6]
2Wolfgang Rosenstiel [1] [2] [3] [4] [5] [6]
3Björn Sander [5]
4Jürgen Schnerr [6]
5Timo Schönwald [1]
6Markus Schwarz [2] [3]
7Axel Siebenborn [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)