2008 |
12 | EE | Bjorn De Sutter,
Paul Coene,
Tom Vander Aa,
Bingfeng Mei:
Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays.
LCTES 2008: 151-160 |
11 | EE | Bingfeng Mei,
Bjorn De Sutter,
Tom Vander Aa,
M. Wouters,
Andreas Kanstein,
Steven Dupont:
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder.
Signal Processing Systems 51(3): 225-243 (2008) |
2007 |
10 | EE | Tom Vander Aa,
Bingfeng Mei,
Bjorn De Sutter:
A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots.
CASES 2007: 229-237 |
2006 |
9 | EE | Bjorn De Sutter,
Bingfeng Mei,
Andrei Bartic,
Tom Vander Aa,
Mladen Berekovic,
Jean-Yves Mignolet,
Kris Croes,
Paul Coene,
Miro Cupac,
Aïssa Couvreur,
Andy Folens,
Steven Dupont,
Bert Van Thielen,
Andreas Kanstein,
Hong-Seok Kim,
Suk Jin Kim:
Hardware and a Tool Chain for ADRES.
ARC 2006: 425-430 |
2005 |
8 | | Francisco-Javier Veredas,
Michael Scheppler,
Will Moffat,
Bingfeng Mei:
Custom Implementation of the Coarse-Grained Reconfigurable ADRES Architecture for Multimedia Purposes.
FPL 2005: 106-111 |
7 | | Bingfeng Mei,
Francisco-Javier Veredas,
Bart Masschelein:
Mapping an H.264/AVC Decoder onto the ADRES Reconfigurable Architecture.
FPL 2005: 622-625 |
6 | EE | Bingfeng Mei,
Andy Lambrechts,
Diederik Verkest,
Jean-Yves Mignolet,
Rudy Lauwereins:
Architecture Exploration for a Reconfigurable Architecture Template.
IEEE Design & Test of Computers 22(2): 90-101 (2005) |
2004 |
5 | EE | Bingfeng Mei,
Serge Vernalde,
Diederik Verkest,
Rudy Lauwereins:
Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study.
DATE 2004: 1224-1229 |
4 | EE | Andy Lambrechts,
Tom Vander Aa,
Murali Jayapala,
Guillermo Talavera,
Anthony Leroy,
Adelina Shickova,
Francisco Barat,
Bingfeng Mei,
Francky Catthoor,
Diederik Verkest,
Geert Deconinck,
Henk Corporaal,
Frédéric Robert,
Jordi Carrabina Bordoll:
Design Style Case Study for Embedded Multi Media Compute Nodes.
RTSS 2004: 104-113 |
2003 |
3 | EE | Bingfeng Mei,
Serge Vernalde,
Diederik Verkest,
Hugo De Man,
Rudy Lauwereins:
Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling.
DATE 2003: 10296-10301 |
2 | EE | Bingfeng Mei,
Serge Vernalde,
Diederik Verkest,
Hugo De Man,
Rudy Lauwereins:
ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix.
FPL 2003: 61-70 |
2001 |
1 | EE | Yajun Ha,
Bingfeng Mei,
Patrick Schaumont,
Serge Vernalde,
Rudy Lauwereins,
Hugo De Man:
Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware.
FPL 2001: 264-274 |