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Bingfeng Mei

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2008
12EEBjorn De Sutter, Paul Coene, Tom Vander Aa, Bingfeng Mei: Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays. LCTES 2008: 151-160
11EEBingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. Wouters, Andreas Kanstein, Steven Dupont: Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder. Signal Processing Systems 51(3): 225-243 (2008)
2007
10EETom Vander Aa, Bingfeng Mei, Bjorn De Sutter: A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots. CASES 2007: 229-237
2006
9EEBjorn De Sutter, Bingfeng Mei, Andrei Bartic, Tom Vander Aa, Mladen Berekovic, Jean-Yves Mignolet, Kris Croes, Paul Coene, Miro Cupac, Aïssa Couvreur, Andy Folens, Steven Dupont, Bert Van Thielen, Andreas Kanstein, Hong-Seok Kim, Suk Jin Kim: Hardware and a Tool Chain for ADRES. ARC 2006: 425-430
2005
8 Francisco-Javier Veredas, Michael Scheppler, Will Moffat, Bingfeng Mei: Custom Implementation of the Coarse-Grained Reconfigurable ADRES Architecture for Multimedia Purposes. FPL 2005: 106-111
7 Bingfeng Mei, Francisco-Javier Veredas, Bart Masschelein: Mapping an H.264/AVC Decoder onto the ADRES Reconfigurable Architecture. FPL 2005: 622-625
6EEBingfeng Mei, Andy Lambrechts, Diederik Verkest, Jean-Yves Mignolet, Rudy Lauwereins: Architecture Exploration for a Reconfigurable Architecture Template. IEEE Design & Test of Computers 22(2): 90-101 (2005)
2004
5EEBingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins: Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. DATE 2004: 1224-1229
4EEAndy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll: Design Style Case Study for Embedded Multi Media Compute Nodes. RTSS 2004: 104-113
2003
3EEBingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins: Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. DATE 2003: 10296-10301
2EEBingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins: ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. FPL 2003: 61-70
2001
1EEYajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, Hugo De Man: Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware. FPL 2001: 264-274

Coauthor Index

1Tom Vander Aa [4] [9] [10] [11] [12]
2Francisco Barat [4]
3Andrei Bartic [9]
4Mladen Berekovic [9]
5Jordi Carrabina (Jordi Carrabina Bordoll) [4]
6Francky Catthoor [4]
7Paul Coene [9] [12]
8Henk Corporaal [4]
9Aïssa Couvreur [9]
10Kris Croes [9]
11Miro Cupac [9]
12Geert Deconinck [4]
13Steven Dupont [9] [11]
14Andy Folens [9]
15Yajun Ha [1]
16Murali Jayapala [4]
17Andreas Kanstein [9] [11]
18Hong-Seok Kim [9]
19Suk Jin Kim [9]
20Andy Lambrechts [4] [6]
21Rudy Lauwereins [1] [2] [3] [5] [6]
22Anthony Leroy [4]
23Hugo De Man [1] [2] [3]
24Bart Masschelein [7]
25Jean-Yves Mignolet [6] [9]
26Will Moffat [8]
27Frédéric Robert [4]
28Patrick Schaumont [1]
29Michael Scheppler [8]
30Adelina Shickova [4]
31Bjorn De Sutter [9] [10] [11] [12]
32Guillermo Talavera [4]
33Bert Van Thielen [9]
34Francisco-Javier Veredas [7] [8]
35Diederik Verkest [2] [3] [4] [5] [6]
36Serge Vernalde [1] [2] [3] [5]
37M. Wouters [11]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)