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Jean-Paul Heron

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2001
7EEJean-Paul Heron, Roger Woods, Sakir Sezer, Richard H. Turner: Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead. VLSI Signal Processing 28(1-2): 97-113 (2001)
1999
6EEJean-Paul Heron, Roger Woods: Accelerating Run-Time Reconfiguration on FCCMs. FCCM 1999: 260-261
5EERichard H. Turner, Roger Woods, Sakir Sezer, Jean-Paul Heron: A Virtual Hardware Handler for RTR Systems. FCCM 1999: 262-263
1998
4EESakir Sezer, Roger Woods, Jean-Paul Heron, Alan Marshall: Fast Partial Reconfiguration for FCCMs. FCCM 1998: 318-319
3EERoger Woods, David W. Trainor, Jean-Paul Heron: Applying an XC6200 to Real-Time Image Processing. IEEE Design & Test of Computers 15(1): 30-38 (1998)
1997
2EERoger Woods, Stefan H.-M. Ludwig, Jean-Paul Heron, David W. Trainor, Stephan W. Gehring: FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again). FCCM 1997: 155-164
1996
1 Jean-Paul Heron, Roger Woods: Architectural Strategies for Implementing an Image Processing Algorithm on XC6000 FPGA. FPL 1996: 317-326

Coauthor Index

1Stephan W. Gehring [2]
2Stefan H.-M. Ludwig [2]
3Alan Marshall [4]
4Sakir Sezer [4] [5] [7]
5David W. Trainor [2] [3]
6Richard H. Turner [5] [7]
7Roger Woods (Roger F. Woods) [1] [2] [3] [4] [5] [6] [7]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)