R. Palazzo

2006
2	EE	Fabrizio Ferrandi, G. Ferrara, R. Palazzo, Vincenzo Rana, Marco D. Santambrogio: VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow. IPDPS 2006
2004
1		Sueli I. Rodrigues Costa, M. Muniz, E. Agustini, R. Palazzo: Graphs, tessellations, and perfect codes on flat tori. IEEE Transactions on Information Theory 50(10): 2363-2377 (2004)

Coauthor Index

1	E. Agustini	[1]
2	Sueli I. Rodrigues Costa	[1]
3	Fabrizio Ferrandi	[2]
4	G. Ferrara	[2]
5	M. Muniz	[1]
6	Vincenzo Rana	[2]
7	Marco D. Santambrogio	[2]

Colors in the list of coauthors