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R. Palazzo

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2006
2EEFabrizio Ferrandi, G. Ferrara, R. Palazzo, Vincenzo Rana, Marco D. Santambrogio: VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow. IPDPS 2006
2004
1 Sueli I. Rodrigues Costa, M. Muniz, E. Agustini, R. Palazzo: Graphs, tessellations, and perfect codes on flat tori. IEEE Transactions on Information Theory 50(10): 2363-2377 (2004)

Coauthor Index

1E. Agustini [1]
2Sueli I. Rodrigues Costa [1]
3Fabrizio Ferrandi [2]
4G. Ferrara [2]
5M. Muniz [1]
6Vincenzo Rana [2]
7Marco D. Santambrogio [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)