Prasun Raha

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2EEPrasun Raha, Scott Randall, Richard Jennings, Bob Helmick, Ajith Amerasekera, Baher Haroun: A Robust Digital Delay Line Architecture in a 0.13µm CMOS Technology Node for Reduced Design and Process Sensitivities. ISQED 2002: 148-
1EEYi-Kan Cheng, Prasun Raha, Chin-Chi Teng, Elyse Rosenbaum, Sung-Mo Kang: ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips. IEEE Trans. on CAD of Integrated Circuits and Systems 17(8): 668-681 (1998)

Coauthor Index

1Ajith Amerasekera [2]
2Yi-Kan Cheng [1]
3Baher Haroun [2]
4Bob Helmick [2]
5Richard Jennings [2]
6Sung-Mo Kang [1]
7Scott Randall [2]
8Elyse Rosenbaum [1]
9Chin-Chi Teng [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)