Prasun Raha

2002
2	EE	Prasun Raha, Scott Randall, Richard Jennings, Bob Helmick, Ajith Amerasekera, Baher Haroun: A Robust Digital Delay Line Architecture in a 0.13µm CMOS Technology Node for Reduced Design and Process Sensitivities. ISQED 2002: 148-
1998
1	EE	Yi-Kan Cheng, Prasun Raha, Chin-Chi Teng, Elyse Rosenbaum, Sung-Mo Kang: ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips. IEEE Trans. on CAD of Integrated Circuits and Systems 17(8): 668-681 (1998)

Coauthor Index

1	Ajith Amerasekera	[2]
2	Yi-Kan Cheng	[1]
3	Baher Haroun	[2]
4	Bob Helmick	[2]
5	Richard Jennings	[2]
6	Sung-Mo Kang	[1]
7	Scott Randall	[2]
8	Elyse Rosenbaum	[1]
9	Chin-Chi Teng	[1]

Colors in the list of coauthors