2006 | ||
---|---|---|
3 | EE | Jiun-Lang Huang, Jui-Jer Huang, Yuan-Shuang Liu: A Low-Cost Jitter Measurement Technique for BIST Applications. J. Electronic Testing 22(3): 219-228 (2006) |
2004 | ||
2 | EE | Jui-Jer Huang, Jiun-Lang Huang: An Infrastructure IP for On-Chip Clock Jitter Measurement. ICCD 2004: 186-191 |
2003 | ||
1 | EE | Jui-Jer Huang, Jiun-Lang Huang: A Low-Cost Jitter Measurement Technique for BIST Applications. Asian Test Symposium 2003: 336-339 |
1 | Jiun-Lang Huang | [1] [2] [3] |
2 | Yuan-Shuang Liu | [3] |