| 2008 |
| 14 | EE | Nicola E. L'Insalata,
Sergio Saponara,
Luca Fanucci,
Pierangelo Terreni:
Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems.
IEICE Transactions 91-C(4): 487-496 (2008) |
| 2007 |
| 13 | EE | Nicola E. L'Insalata,
Sergio Saponara,
Luca Fanucci,
Pierangelo Terreni:
Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems.
DSD 2007: 361-368 |
| 2006 |
| 12 | EE | Pierluigi Nuzzo,
Geert Van der Plas,
Fernando De Bernardinis,
Liesbet Van der Perre,
Bert Gyselinckx,
Pierangelo Terreni:
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW.
DAC 2006: 873-878 |
| 11 | EE | Sergio Saponara,
Pierangelo Terreni:
Mixed-signal design of a digital input power amplifier for automotive audio applications.
DATE Designers' Forum 2006: 212-216 |
| 2005 |
| 10 | EE | Fernando De Bernardinis,
Pierluigi Nuzzo,
Pierangelo Terreni,
Alberto L. Sangiovanni-Vincentelli:
Enriching an analog platform for analog-to-digital converter design.
ISCAS (2) 2005: 1286-1289 |
| 9 | EE | Luca Fanucci,
Sergio Saponara,
Massimiliano Melani,
Pierangelo Terreni:
Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems.
IEICE Transactions 88-D(7): 1538-1545 (2005) |
| 2004 |
| 8 | | Sergio Saponara,
Luca Fanucci,
Pierangelo Terreni:
Context-Aware Algorithmic/Architectural Solutions for Real-time Embedded Video Systems.
WISES 2004: 79-90 |
| 2003 |
| 7 | EE | Fernando De Bernardinis,
Luca Fanucci,
T. Ramacciotti,
Pierangelo Terreni:
A QoS Internet Protocol Scheduler on the IXP1200 Network Platform.
IWSOC 2003: 394-399 |
| 2002 |
| 6 | EE | Luca Fanucci,
Massimiliano Forliti,
Pierangelo Terreni:
FAST: FFT ASIC automated synthesis.
Integration 33(1-2): 23-37 (2002) |
| 1999 |
| 5 | EE | Fernando De Bernardinis,
Roberto Roncella,
Roberto Saletti,
Pierangelo Terreni,
Graziano Bertini:
An efficient VLSI architecture for real-time additive synthesis of musical signals.
IEEE Trans. VLSI Syst. 7(1): 105-110 (1999) |
| 1997 |
| 4 | EE | Riccardo Mariani,
Roberto Roncella,
Roberto Saletti,
Pierangelo Terreni:
On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic.
ASYNC 1997: 54- |
| 3 | EE | Riccardo Mariani,
Roberto Roncella,
Roberto Saletti,
Pierangelo Terreni:
Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits.
ISMVL 1997: 203-208 |
| 1993 |
| 2 | | Maurizio Ciampa,
Pierangelo Terreni,
Mario Poletti:
Conditions for the existence and uniqueness of DC solutions of networks containing nonlinear opamps with ideal model.
ISCAS 1993: 2498-2501 |
| 1 | | Maurizio Ciampa,
Pierangelo Terreni,
Mario Poletti:
Linear networks and systems polynomially depending on parameters: Behaviour of the solutions for large and small values.
ISCAS 1993: 2682-2685 |