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François R. Boyer

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2007
8EEBill Pontikakis, Hung Tien Bui, François R. Boyer, Yvon Savaria: A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. ISCAS 2007: 633-636
2006
7EEBill Pontikakis, François R. Boyer, Yvon Savaria: A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs. ISCAS 2006
2005
6EEH. G. Epassa, François R. Boyer, Yvon Savaria: Implementation of a cycle by cycle variable speed processor. ISCAS (4) 2005: 3335-3338
5EEBill Pontikakis, François R. Boyer, Yvon Savaria: Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period. IWSOC 2005: 454-458
2004
4EEJames Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: .NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation. DATE 2004: 732-733
3EEJames Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: ESys.Net: a new solution for embedded systems modeling and simulation. LCTES 2004: 107-114
2003
2EEJérôme Chevalier, Mathieu Rondonneau, Olivier Benny, Guy Bois, El Mostapha Aboulhamid, François R. Boyer: SPACE: A Hardware/Software SystemC Modeling Platform Including an RTOS. FDL 2003: 704-716
2001
1EEFrançois R. Boyer, El Mostapha Aboulhamid, Yvon Savaria, Michel Boyer: Optimal design of synchronous circuits using software pipelining techniques. ACM Trans. Design Autom. Electr. Syst. 6(4): 516-532 (2001)

Coauthor Index

1El Mostapha Aboulhamid [1] [2] [3] [4]
2Olivier Benny [2]
3Guy Bois [2] [3] [4]
4Michel Boyer [1]
5Hung Tien Bui [8]
6Luc Charest [3] [4]
7Jérôme Chevalier [2]
8J. P. David [3] [4]
9H. G. Epassa [6]
10James Lapalme [3] [4]
11Gabriela Nicolescu [3] [4]
12Bill Pontikakis [5] [7] [8]
13Mathieu Rondonneau [2]
14Yvon Savaria [1] [5] [6] [7] [8]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)