2007 |
22 | EE | Kiyotaka Ichiyama,
Masahiro Ishida,
Takahiro J. Yamaguchi,
Mani Soma:
An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter.
ISCAS 2007: 2798-2801 |
2004 |
21 | EE | Kazuyuki Maruo,
Masayoshi Ichikawa,
Naoto Miyamoto,
Leo Karnan,
Takahiro J. Yamaguchi,
Koji Kotani,
Tadahiro Ohmi:
A Dynamically-Reconfigurable Image Recognition Processor.
IPDPS 2004 |
20 | EE | Takahiro J. Yamaguchi:
Loopback or not?
ITC 2004: 1434 |
19 | EE | Takahiro J. Yamaguchi,
Masahiro Ishida,
Kiyotaka Ichiyama,
Mani Soma,
Christian Krawinkel,
Katsuaki Ohsawa,
Masao Sugai:
A Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems.
ITC 2004: 77-84 |
18 | EE | Takahiro J. Yamaguchi,
Mani Soma,
Jim Nissen,
David Halter,
Rajesh Raina,
Masahiro Ishida:
Skew measurements in clock distribution circuits using an analytic signal method.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(7): 997-1009 (2004) |
2003 |
17 | EE | Takahiro J. Yamaguchi:
Open Architecture ATE and 250 Consecutive UIs.
ITC 2003: 1307 |
16 | EE | Takahiro J. Yamaguchi,
Mani Soma,
Masahiro Ishida,
Makoto Kurosawa,
Hirobumi Musha:
Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements.
ITC 2003: 58-66 |
15 | EE | Takahiro J. Yamaguchi,
Masahiro Ishida,
Mani Soma,
Louis Malarsie,
Hirobumi Musha:
Timing Jitter Measurement of Intrinsic Random Jitter and Sinusoidal Jitter Using Frequency Division.
J. Electronic Testing 19(2): 183-193 (2003) |
2002 |
14 | EE | Masahiro Ishida,
Takahiro J. Yamaguchi,
Mani Soma,
Hirobumi Musha:
Effects of Amplitude Modulation in Jitter Tolerance Measurements of Communication Devices.
Asian Test Symposium 2002: 45-48 |
13 | EE | Takahiro J. Yamaguchi:
Wireless SOC Testing: Can RF Testing Costs Be Reduced?
ITC 2002: 1229 |
12 | EE | Takahiro J. Yamaguchi,
Mani Soma,
Masahiro Ishida,
Hirobumi Musha,
Louis Malarsie:
A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter.
ITC 2002: 717-725 |
11 | EE | Takahiro J. Yamaguchi,
Masahiro Ishida,
Mani Soma,
Louis Malarsie,
Hirobumi Musha:
Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division.
VTS 2002: 207-212 |
10 | EE | Takahiro J. Yamaguchi,
Dong Sam Ha,
Masahiro Ishida,
Tadahiro Ohmi:
A Method for Compressing Test Data Based on Burrows-Wheeler Transformation.
IEEE Trans. Computers 51(5): 486-497 (2002) |
2001 |
9 | EE | Takahiro J. Yamaguchi,
Mani Soma,
Jim Nissen,
David Halter,
Rajesh Raina,
Masahiro Ishida:
Testing clock distribution circuits using an analytic signal method.
ITC 2001: 323-331 |
8 | EE | Takahiro J. Yamaguchi,
Masahiro Ishida,
Mani Soma,
David Halter,
Rajesh Raina,
Jim Nissen:
A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals.
VTS 2001: 102-110 |
2000 |
7 | | Takahiro J. Yamaguchi,
Mani Soma,
David Halter,
Jim Nissen,
Rajesh Raina,
Masahiro Ishida,
Toshifumi Watanabe:
Jitter measurements of a PowerPCTM microprocessor using an analytic signal method.
ITC 2000: 955-964 |
6 | EE | Takahiro J. Yamaguchi,
Masahiro Ishida,
Mani Soma,
Toshifumi Watanabe,
Tadahiro Ohmi:
Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method.
VTS 2000: 395-402 |
5 | EE | Han Bin Kim,
Dong Sam Ha,
Takeshi Takahashi,
Takahiro J. Yamaguchi:
A new approach to built-in self-testable datapath synthesis based on integer linear programming.
IEEE Trans. VLSI Syst. 8(5): 594-605 (2000) |
1998 |
4 | EE | Masahiro Ishida,
Dong Sam Ha,
Takahiro J. Yamaguchi:
COMPACT: A Hybrid Method for Compressing Test Data.
VTS 1998: 62-69 |
1997 |
3 | EE | Takahiro J. Yamaguchi:
Static Testing of ADCs Using Wavelet Transforms.
Asian Test Symposium 1997: 188-193 |
2 | | Takahiro J. Yamaguchi,
Mani Soma:
Dynamic Testing of ADCs Using Wavelet Transforms.
ITC 1997: 379-388 |
1 | | Takahiro J. Yamaguchi,
Masahiro Ishida,
Marco Tilgner,
Dong Sam Ha:
An Efficient Method for Compressing Test Data.
ITC 1997: 79-88 |