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Jorge Juan-Chico

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2007
16EEDavid Guerrero, Alejandro Millán, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Enrique Ostúa, Julian Viejo: Static Power Consumption in CMOS Gates Using Independent Bodies. PATMOS 2007: 404-412
15EEDavid Guerrero, Alejandro Millán, Jorge Juan-Chico, Manuel Jesús Bellido Díaz, Paulino Ruiz-de-Clavijo, Enrique Ostúa, Julian Viejo: Improving the Performance of Static CMOS Gates by Using Independent Bodies. J. Low Power Electronics 3(1): 70-77 (2007)
2006
14EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel Jesús Bellido Díaz, Alejandro Millán, David Guerrero, Enrique Ostúa, Julian Viejo: Accurate Logic-Level Current Estimation for Digital CMOS Circuits. J. Low Power Electronics 2(1): 87-94 (2006)
2005
13EEAlejandro Millán Calderón, Manuel Jesús Bellido Díaz, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, David Guerrero Martos, Enrique Ostúa, Julian Viejo: Application of Internode Model to Global Power Consumption Estimation in SCMOS Gates. PATMOS 2005: 337-347
12EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel Jesús Bellido Díaz, Alejandro Millán Calderón, David Guerrero Martos, Enrique Ostúa, Julian Viejo: Logic-Level Fast Current Simulation for Digital CMOS Circuits. PATMOS 2005: 425-435
2004
11EEAlejandro Millán, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, David Guerrero, Enrique Ostúa: Signal Sampling Based Transition Modeling for Digital Gates Characterization. PATMOS 2004: 829-837
2003
10 Jorge Juan-Chico, Enrico Macii: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings Springer 2003
9EEAlejandro Millán, Manuel J. Bellido, Jorge Juan-Chico, David Guerrero, Paulino Ruiz-de-Clavijo, Enrique Ostúa: Internode: Internal Node Logic Computational Model. Annual Simulation Symposium 2003: 241-248
8EEDavid Guerrero, Gustavo Wilke, José Luís Almada Güntzel, Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Alejandro Millán: Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits. PATMOS 2003: 501-510
2002
7EEC. Baena, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Carlos J. Jiménez, Manuel Valencia: Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level. PATMOS 2002: 353-362
6EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel J. Bellido, Alejandro Millán, David Guerrero: Efficient and Fast Current Curve Estimation of CMOS Digital Circuits at the Logic Level. PATMOS 2002: 400-408
5EEAlejandro Millán, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, David Guerrero: Characterization of Normal Propagation Delay for Delay Degradation Model (DDM). PATMOS 2002: 477-486
2001
4EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel J. Bellido, Antonio J. Acosta, Manuel Valencia: HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay model. DATE 2001: 467-471
3EEManuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia: Gate-level simulation of CMOS circuits using the IDDM model. ISCAS (5) 2001: 483-486
2000
2EEJorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia: Degradation Delay Model Extension to CMOS Gates. PATMOS 2000: 149-158
1EEAntonio J. Acosta, Raúl Jiménez, Jorge Juan-Chico, Manuel J. Bellido, Manuel Valencia: Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits. PATMOS 2000: 316-326

Coauthor Index

1Antonio J. Acosta [1] [2] [3] [4]
2C. Baena [7]
3Manuel Jesús Bellido Díaz (Manuel J. Bellido) [1] [2] [3] [4] [5] [6] [7] [8] [9] [11] [12] [13] [14] [15] [16]
4David Guerrero [5] [6] [8] [9] [11] [14] [15] [16]
5José Luís Almada Güntzel [8]
6Carlos J. Jiménez [7]
7Raúl Jiménez [1]
8Enrico Macii [10]
9David Guerrero Martos [12] [13]
10Alejandro Millán (Alejandro Millán Calderón) [5] [6] [8] [9] [11] [12] [13] [14] [15] [16]
11Enrique Ostúa [9] [11] [12] [13] [14] [15] [16]
12Paulino Ruiz-de-Clavijo [2] [3] [4] [5] [6] [7] [8] [9] [11] [12] [13] [14] [15] [16]
13Manuel Valencia [1] [2] [3] [4] [7]
14Julian Viejo [12] [13] [14] [15] [16]
15Gustavo Wilke [8]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)