| |
| 2005 | ||
|---|---|---|
| 2 | EE | Alejandro Millán Calderón, Manuel Jesús Bellido Díaz, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, David Guerrero Martos, Enrique Ostúa, Julian Viejo: Application of Internode Model to Global Power Consumption Estimation in SCMOS Gates. PATMOS 2005: 337-347 |
| 1 | EE | Paulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel Jesús Bellido Díaz, Alejandro Millán Calderón, David Guerrero Martos, Enrique Ostúa, Julian Viejo: Logic-Level Fast Current Simulation for Digital CMOS Circuits. PATMOS 2005: 425-435 |
| 1 | Manuel Jesús Bellido Díaz (Manuel J. Bellido) | [1] [2] |
| 2 | Jorge Juan-Chico | [1] [2] |
| 3 | Alejandro Millán (Alejandro Millán Calderón) | [1] [2] |
| 4 | Enrique Ostúa | [1] [2] |
| 5 | Paulino Ruiz-de-Clavijo | [1] [2] |
| 6 | Julian Viejo | [1] [2] |